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VSC7146 데이터시트(PDF) 8 Page - Vitesse Semiconductor Corporation |
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VSC7146 데이터시트(HTML) 8 Page - Vitesse Semiconductor Corporation |
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8 / 19 page ![]() VITESSE SEMICONDUCTOR CORPORATION Advance Product Information VSC7146 2.5Gb/s, 20-Bit Transceiver Page 8 © VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 8/28/00 G52162-0 Rev. 2.7 Figure 6: TBC and REF Timing Waveforms Table 5: TBC and REF Requirements Parameters Description Min Max Units Conditions T1 Necessary lag time between TBC and REF —2.0 ns Measured from falling edge of REF to rising edge of TBC. T2 Necessary lead time between TBC and REF —2.0 ns Measured from falling edge of REF to rising edge of TBC. FR Frequency Range 105 52.5 127 63.5 MHz Range over which both transmit and receive reference clocks on any link may be centered. The figure on top relects TXMODE=1 and the bottom one reflects TXMODE=0. FO Frequency Offset −100 +100 ppm |TXTBC - RXTBC| TL,TH Pulse Width, Low / High 4.5 2.5 ns Low is measured from VIL(max) to VIL(max), High is measured from VIH(min) to VIH(min). Min measurement refers to TXMODE=0 and Max measurement refers to TXMODE=1. DC TBC and REF duty cycle 40 60 % Measured at 1.5V. TRCR,TRCF TBC and REF rise and fall time 0.6 1.5 ns Between VIL(max) and VIH(min). TBC VIL(max) VIH(min) TL TH REF TBC REF T1 T2 REF and TBC must not have their opposing edges coincident within 2.0ns of each other. |
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