54HC4050RPFS datasheet(4/8 Pages) ETC

4 / 8 page

All data sheets are subject to change without notice

CMOS Logic Hex Non-Inverting Buffers

54HC4050

12.19.01 Rev 1

1000587

Quiescent Device Current

I = VCC or GND, IO = 0mA

CC = 6V

+25°C

µA

-55 to 125°C

TABLE 6. 54HC4050 AC ELECTRICAL CHARACTERISTICS

CC = 5V ±10%, TA = -55 TO 125°C, UNLESS OTHERWISE SPECIFIED)

PARAMETER

SYMBOL

TEST CONDITION

MIN

MAX

UNIT

Propogation Delay

nA to nY

PLH, tPHL

L = 50pF

CC = 2V

+25°C

-55 to 125°C

130

CC = 4.5V

+25°C

-55 to 125°C

CC = 6V

+25°C

-55 to 125°C

Transition Times

(Figure 1)

TLH, tTHL

L = 50pF

CC = 2V

+25°C

-55 to 125°C

110

CC = 4.5V

+25°C

-55 to 125°C

CC = 6V

+25°C

-55 to 125°C

TABLE 7. 54HC4050 CAPACITANCE1

1. Guaranteed by design.

PARAMETER

SYMBOL

TEST CONDITIONS

MAX

UNIT

Input Capacitance

Power Dissipation Capacitance2, 3

2. C

PD is used to determine the dynamic power consumption, per gate.

3. P

D = VCC

fi (C

PD + CL) where fi = Input Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.

CC = 5V

TABLE 5. 54HC4050 DC ELECTRICAL CHARACTERISTICS

CC = 5V ±10%, TA = -55 TO 125°C, UNLESS OTHERWISE SPECIFIED)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

MAX

UNIT

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