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SCN68652 데이터시트(PDF) 2 Page - NXP Semiconductors

부품명 SCN68652
상세설명  Multi-protocol communications controller (MPCC)
PDF  28 Pages
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SCN68652 데이터시트(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
SCN2652/SCN68652
Multi-protocol communications controller (MPCC)
2
1995 May 01
853-1068 15179
DESCRIPTION
The SCN2652/68652 Multi-Protocol Communications Controller
(MPCC) is a monolithic n-channel MOS LSI circuit that formats,
transmits and receives synchronous serial data while supporting
bit-oriented or byte control protocols. The chip is TTL compatible,
operates from a single +5V supply, and can interface to a processor
with an 8 or 16-bit bidirectional data bus.
APPLICATIONS
• Intelligent terminals
• Line controllers
• Network processors
• Front end communications
• Remote data concentrators
• Communication test equipment
• Computer to computer links
FEATURES
• DC to 2Mbps data rate
• Bit-oriented protocols (BOP): SDLC, ADCCP, HDLC
• Byte-control protocols (BCP): DDCMP, BISYNC (external CRC)
• Programmable operation
– 8 or 16-bit tri-state data bus
– Error control – CRC or VRC or none
– Character length – 1 to 8 bits for BOP or 5 to 8 bits for BCP
– SYNC or secondary station address comparison for BCP-BOP
– Idle transmission of SYNC/FLAG or MARK for BCP-BOP
• Automatic detection and generation of special BOP control
sequences, i.e., FLAG, ABORT, GA
• Zero insertion and deletion for BOP
• Short character detection for last BOP data character
• SYNC generation, detection, and stripping for BCP
• Maintenance mode for self-testing
• TTL compatible
• Single +5V supply
PIN CONFIGURATION
Pin Function
Pin Function
1NC
23 NC
2CE
24 A0
3
RxC
25 BYTE
4
RxSI
26 DBEN
5
S/F
27 DB07
6
RxA
28 DB06
7
RxDA
29 DB05
8
RxSA
30 DB04
9
RxE
31 DB03
10 GND
32 DB02
11
DB08
33 DB01
12 NC
34 NC
13 DB09
35 DB00
14 DB10
36 VCC
15 DB11
37 RESET
16 DB12
38 TxA
17 DB13
39 TxBE
18 DB14
40 TxU
19 DB15
41 TxE
20 R/W
42 TxSQ
21 A2
43 TxC
22 A1
44 MM
1
39
17
28
40
29
18
7
PLCC
6
TOP VIEW
INDEX
CORNER
NOTE: DB00 is least significant bit, highest number
(that is, DB15, A2) is most significant bit.
24
23
22
21
20
19
18
17
16
15
28
27
12
10
11
9
8
7
6
5
4
3
2
1
14
13
26
25
29
30
31
32
33
34
35
36
37
38
39
40
CE
RxC
RxSI
S/F
RxA
RxDA
RxSA
RxE
GND
DB08
DB09
DB10
DB11
DB12
DB13
DB14
DB15
R/W
A2
A1
A0
BYTE
DBEN
DB07
DB06
DB05
DB04
DB03
DB02
DB01
DB00
VCC
RESET
TxA
TxBE
TxU
TxE
TxSQ
TxC
MM
DIP
TOP VIEW
SD00057
Figure 1. Pin Configuration



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