ST92F120JR1Q7 datasheet(306/324 Pages) STMICROELECTRONICS

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ST92F120 - ELECTRICAL CHARACTERISTICS

I²C/DDC-BUS TIMING TABLE

(VDD = 5V ± 10%, TA = –40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)

Note:

(1) Value guaranteed by design

(2) The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the undefined region of the falling

edge of SCL

(3) The maximum hold time of the START condition has only to be met if the interface does not stretch the low period of SCL signal

Legend:

Tck = INTCLK period = OSCIN period when OSCIN is not divided by 2;

2 x OSCIN period when OSCIN is divided by 2;

OSCIN period x PLL factor when the PLL is enabled.

Cb = total capacitance of one bus line in pF

FREQ[2:0] = Frequency bits value of I²C Own Address Register 2 (I2COAR2)

Symbol

Parameter

Formula

Protocol Specifications

Unit

Standard I²C

Fast I²C

Min

Max

Min

Max

fINTCLK Internal Frequency (Slave Mode)

2.5

MHz

fSCL

SCL clock frequency

100

400

kHz

TBUF

Bus free time between a STOP

and START condition

4.7

1.3

µs

THIGH

SCL clock high period

4.0

0.6

µs

TLOW

SCL clock low period

Standard Mode

Fast Mode

THIGH – 3 x Tck

2 x (THIGH – 3 x Tck)

4.7

1.3

µs

THD:STA

Hold time START condition. After this peri-

od, the first clock pulse is generated

TLOW + Tck

4.0

0.6

µs

TSU:STA

Set-up time for a repeated START condi-

tion

TLOW + THIGH –

THD:STA

4.7

0.6

µs

THD:DAT Data hold time

FREQ[2:0] = 000

FREQ[2:0] = 001

FREQ[2:0] = 010

FREQ[2:0] = 011

3 x Tck

4 x Tck

10 x Tck

0 (1;2)

0.9 (1;3) ns

TSU:DAT

Data set-up time

(Without SCL stretching)

TLOW – THD:DAT

250 (1)

100 (1)

Data set-up time

(With SCL stretching)

FREQ[2:0] = 000

FREQ[2:0] = 001

FREQ[2:0] = 010

FREQ[2:0] = 011

7 x Tck

15 x Tck

31 x Tck

Rise time of both SDA and SCL signals

1000 (1) 20+0.1Cb (1)

Fall time of both SDA and SCL signals

300 (1) 20+0.1Cb(1)

TSU:STO Set-up time for STOP condition

TLOW + THIGH –

THD:STA

4.0

0.6

Capacitive load for each bus line

400

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