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AD6649EBZ 데이터시트(PDF) 12 Page - Analog Devices |
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AD6649EBZ 데이터시트(HTML) 12 Page - Analog Devices |
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12 / 41 page ![]() Data Sheet AD6649 Rev. C | Page 11 of 40 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 CLK+ CLK– SYNC FDA FDB DNC DNC D0– (LSB) D0+ (LSB) DRVDD D1– D1+ D2– D2+ D3– D3+ NOTES 1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN. 2. THE EXPOSED THERMAL PADDLE ON THE BOTTOM OF THE PACKAGE PROVIDES THE ANALOG GROUND FOR THE PART. THIS EXPOSED PADDLE MUST BE CONNECTED TO GROUND FOR PROPER OPERATION. PDWN OEB CSB SCLK SDIO OR+ OR– D13+ (MSB) D13– (MSB) D12+ D21– DRVDD D11+ D11– D10+ D10– 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 AD6649 TOP VIEW (Not to Scale) PIN 1 INDICATOR Figure 4. LFCSP Interleaved Parallel LVDS Pin Configuration (Top View) Table 8. Pin Function Descriptions (Interleaved Parallel LVDS Mode) Pin No. Mnemonic Type Description ADC Power Supplies 10, 19, 28, 37 DRVDD Supply Digital Output Driver Supply (1.8 V Nominal). 49, 50, 53, 54, 59, 60, 63, 64 AVDD Supply Analog Power Supply (1.8 V Nominal). 6, 7, 55, 56, 58 DNC Do Not Connect. Do not connect to this pin. 0 AGND, Exposed Paddle Ground Analog Ground. The exposed thermal paddle on the bottom of the package provides the analog ground for the part. This exposed paddle must be connected to ground for proper operation. ADC Analog 51 VIN+A Input Differential Analog Input Pin (+) for Channel A. 52 VIN−A Input Differential Analog Input Pin (−) for Channel A. 62 VIN+B Input Differential Analog Input Pin (+) for Channel B. 61 VIN−B Input Differential Analog Input Pin (−) for Channel B. 57 VCM Output Common-Mode Level Bias Output for Analog Inputs. This pin should be decoupled to ground using a 0.1 μF capacitor. 1 CLK+ Input ADC Clock Input—True. 2 CLK− Input ADC Clock Input—Complement. ADC Fast Detect Outputs 4 FDA Output Channel A Fast Detect Indicator (CMOS Levels). 5 FDB Output Channel B Fast Detect Indicator (CMOS Levels). Digital Input 3 SYNC Input Digital Synchronization Pin. Slave mode only. Digital Outputs 9 D0+ (LSB) Output Channel A/Channel B LVDS Output Data 0—True. 8 D0− (LSB) Output Channel A/Channel B LVDS Output Data 0—Complement. 12 D1+ Output Channel A/Channel B LVDS Output Data 1—True. 11 D1− Output Channel A/Channel B LVDS Output Data 1—Complement. 14 D2+ Output Channel A/Channel B LVDS Output Data 2—True. 13 D2− Output Channel A/Channel B LVDS Output Data 2—Complement. 16 D3+ Output Channel A/Channel B LVDS Output Data 3—True. |
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