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AD6679 데이터시트(PDF) 66 Page - Analog Devices |
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AD6679 데이터시트(HTML) 66 Page - Analog Devices |
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66 / 82 page ![]() Data Sheet AD6679 Rev. B | Page 65 of 81 SYNC± SETUP AND HOLD WINDOW MONITOR To assist in ensuring a valid SYNC± capture, the AD6679 has a SYNC± setup and hold window monitor. This feature allows the system designer to determine the location of the SYNC± signals relative to the CLK± signals by reading back the amount of setup and hold margin on the interface through the memory map. Figure 85 and Figure 86 show both the setup and hold status values, respectively, for different phases of SYNC±. The setup detector returns the status of the SYNC± signal before the CLK± edge and the hold detector returns the status of the SYNC± signal after the CLK± edge. Register 0x128 stores the status of SYNC± and indicates whether the SYNC± signal was captured by the ADC. VALID REG 0x128[3:0] CLK± INPUT SYNC± INPUT FLIP FLOP HOLD (MIN) FLIP FLOP HOLD (MIN) FLIP FLOP SETUP (MIN) –1 –2 –3 –4 –5 –6 –7 –8 7 6 5 4 3 2 1 0 Figure 85. SYNC ± Setup Detector |
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