WM8782

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PP, May 2004, Rev 1.0

4

PIN DESCRIPTION

PIN NO.

NAME

TYPE

DESCRIPTION

1

MCLK

Digital Input

Master Clock

2

DOUT

Digital Output

ADC Digital Audio Data

3

LRCLK

Digital Input / Output

Audio Interface Left / Right Clock

4

DGND

Supply

Digital Negative Supply

5

DVDD

Supply

Digital Positive Supply

6

BCLK

Digital Input / Output

Audio Interface Bit Clock

7

IWL

Digital Tristate Input

Word Length

0 = 16 bit

1 = 20 bit

Z = 24 bit

8

FSAMPEN

Digital Tristate Input

Fast Sampling Rate Enable

0 = 48ken

1= 96ken

Z= 192ken

9

FORMAT

Digital Tristate Input

Audio Mode Select

0 = RJ

1 = LJ

Z = I2S

10

VMID

Analogue Output

Midrail Voltage Decoupling Capacitor

11

VREFGND

Supply

Negative Supply and Substrate Connection

12

VREFP

Analogue Output

Positive Reference Voltage Decoupling Pin; 10uF external decoupling

13

AVDD

Supply

Analogue Positive Supply

14

AGND

Supply

Analogue Negative Supply and Substrate Connection

15

AINOPR

Analogue Output

Right Channel Internal Op-Amp Output

16

AINR

Analogue Input

Right Channel Input

17

COM

Analogue Input

Common mode high impedance input should be set to midrail.

18

AINOPL

Analogue Output

Left Channel Internal Op-Amp Output

19

AINL

Analogue Input

Left Channel Input

20

M/S

Digital Input

Interface Mode Select

0 = Slave mode (128fs, 192fs, 256fs, 384fs, 512fs, 768fs)

1 = Master mode (256fs, 128fs)

(fs=word clock frequency)