Rev. 6/19/03

SP3281EB Intelligent +2.35V to +5.5V RS-232 Transceivers

© Copyright 2003 Sipex Corporation

12

The circuit model in Figures 18 and 19 represent

the typical ESD testing circuit used for all three

power supply when the first switch (SW1) is on.

Now that the capacitor is charged, the second

switch (SW2) is on while SW1 switches off. The

voltage stored in the capacitor is then applied

device under test (DUT). In ESD tests, the SW2

switch is pulsed so that the device under test

receives a duration of voltage.

For the Human Body Model, the current limiting

resistor (R

1.5k

Ω an 100pF, respectively. For IEC-1000-4-2,

the current limiting resistor (R

capacitor (C

Figure 18. ESD Test Circuit for Human Body Model

SW1

SW2

Device

Under

Test

DC Power

Source

SW1

SW2

Figure 20. ESD Test Waveform for IEC1000-4-2

Figure 19. ESD Test Circuit for IEC1000-4-2

RS and RV add up to 330

add up to 330Ω for IEC1000-4-2.

RS and RV add up to 330Ω for IEC1000-4-2.

Contact-Discharge Module

SW1

SW2

Device

Under

Test

DC Power

Source

SW1

SW2

Contact-Discharge Module

devised to reduce the unpredictability of the ESD

arc. The discharge current rise time is constant

since the energy is directly transferred without the

air-gaparc. Insituationssuchashandheldsystems,

the ESD charge can be directly discharged to the

equipment from a person already holding the

equipment. The current is transferred on to the

keypadortheserialportoftheequipmentdirectlyand

then travels through the PCB and finally to the IC.

The higher C

lower R

IEC1000-4-2 model are more stringent than the

Human Body Model. The larger storage capacitor

injects a higher voltage to the test point when SW2

is switched on. The lower current limiting resistor

increases the current charge onto the test point.

t=0ns

t=30ns

0A

15A

30A

t ➙