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LPC2131 데이터시트(PDF) 32 Page - NXP Semiconductors

부품명 LPC2131
상세설명  Single-chip 16/32-bit microcontrollers; 32/64/512 kB ISP/IAP Flash with 10-bit ADC and DAC
PDF  41 Pages
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

LPC2131 데이터시트(HTML) 32 Page - NXP Semiconductors

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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 — 15 April 2005
32 of 41
Philips Semiconductors
LPC2131/2132/2134/2136/2138
Single-chip 16/32-bit microcontrollers
[7]
Only allowed for a short time period.
[8]
Minimum condition for VI = 4.5 V, maximum condition for VI = 5.5 V.
[9]
The input threshold voltage of I2C-bus pins meets the I2C-bus specification, so an input voltage below 1.5 V will be recognized as a logic
0 while an input voltage above 3.0 V will be recognized as a logic 1.
[1]
Conditions: VSSA =0V, VDDA = 3.3 V.
[2]
The A/D is monotonic, there are no missing codes.
[3]
The differential non-linearity (ED) is the difference between the actual step width and the ideal step width. See Figure 6.
[4]
The integral no-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See Figure 6.
[5]
The offset error (EO) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See Figure 6.
[6]
The gain error (EG) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See Figure 6.
[7]
The absolute voltage error (ET) is the maximum difference between the center of the steps of the actual transfer curve of the
non-calibrated A/D and the ideal transfer curve. See Figure 6.
Table 11:
A/D converter DC electrical characteristics
VDDA = 2.5 V to 3.6 V; Ta = −40 °C to +85 °C unless otherwise specified. A/D converter frequency 4.5 MHz.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIA
analog input voltage
0
-
VDDA
V
Ciss
analog input
capacitance
-1
pF
ED
differential
non-linearity
[1] [2]
[3]
-
±1
LSB
EL(adj)
integral non-linearity
[1] [4] -
±2
LSB
EO
offset error
[1] [5] -
±3
LSB
EG
gain error
[1] [6] -
±0.5
%
ET
absolute error
[1] [7] -
±4
LSB



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