M95320-RBN6 datasheet(5/39 Pages) STMICROELECTRONICS

5 / 39 page

5/39

M95640, M95320

SUMMARY DESCRIPTION

These electrically erasable programmable memo-

ry (EEPROM) devices are accessed by a high

speed SPI-compatible bus. The memory array is

organized as 8192 x 8 bit (M95640), and 4096 x 8

bit (M95320).

The device is accessed by a simple serial interface

that is SPI-compatible. The bus signals are C, D

and Q, as shown in Table 1 and Figure 2.

The device is selected when Chip Select (S) is tak-

en Low. Communications with the device can be

interrupted using Hold (HOLD).

Figure 2. Logic Diagram

Figure 3. DIP and SO Connections

Note: 1. See page 33 (onwards) for package dimensions, and how

to identify pin-1.

Figure 4. TSSOP14 Connections

Note: 1. See page 33 (onwards) for package dimensions, and how

to identify pin-1.

2. NC = Not Connected

Table 1. Signal Names

AI01789C

VCC

M95xxx

HOLD

VSS

Serial Clock

Serial Data Input

Serial Data Output

Chip Select

Write Protect

HOLD

Hold

VCC

Supply Voltage

VSS

Ground

VSS

HOLD

SVCC

AI01790D

M95xxx

AI02346C

VSS

HOLD

M95xxx

VCC

M95320-RBN6 데이터시트(PDF) 5 Page - STMicroelectronics

M95320-RBN6 데이터시트(HTML) 5 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39

데이터시트 다운로드

링크 URL