AMERICAN MICROSYSTEMS, INC.

September 2000

9.18.00

3

FS6232-01

FS6232-01

FS6232-01

FS6232-01

Two-Way MP Motherboard Clock Generator IC

Two-Way MP Motherboard Clock Generator IC

Two-Way MP Motherboard Clock Generator IC

Two-Way MP Motherboard Clock Generator IC

ISO9001

ISO9001

ISO9001

ISO9001

2.0

Programming Information

Table 4: Function/Clock Enable Configuration

CONTROL INPUTS

CLOCK OUTPUTS (MHz)

PWR_

DWN#

SEL

133/100#

SEL_A

SEL_B

HOST_P

1:4

HOST_N

1:4

MREF_P,

MREF_N

CK66_

0:3

PCI_

0:9

CK48_

0:1

REF

1

0

0

0

100.00

100.00

50.00

66.67

33.33

48.008

14.318

1

0

0

1

reserved

reserved

reserved

reserved

reserved

reserved

reserved

1

0

1

0

reserved

reserved

reserved

reserved

reserved

reserved

reserved

1

0

1

1

tristate

tristate

tristate

tristate

tristate

tristate

tristate

1

1

0

0

133.33

133.33

66.67

66.67

33.33

48.008

14.318

1

1

0

1

reserved

reserved

reserved

reserved

reserved

reserved

reserved

1

1

1

0

reserved

reserved

reserved

reserved

reserved

reserved

reserved

1

1

1

1

XIN ÷ 2

XIN ÷ 2

XIN ÷ 4

XIN ÷ 4

XIN ÷ 8

XIN ÷ 2

XIN

0X

X

X

2

× IREF

tristate

low

low

low

low

low

Table 5: Synthesis Error

CLOCK

TARGET

(MHz)

ACTUAL

(MHz)

DEVIATION

(ppm)

100.0000

99.9963

-36.657

HOST_P1:4,

HOST_N1:4

133.3333

133.3072

-195.924

50.0000

49.9982

-36.657

MREF_P,

MREF_N

66.6667

66.6536

-195.924

CK66

66.6667

66.6642

-36.657

PCI

33.3333

33.3321

-36.657

CK48

(1)

48.000

48.008

+167

1.

48MHz USB clock is required to be +167ppm off from 48.000MHz to conform to USB

standards.

2.

Spread spectrum is disabled

3.0

HOST Buffer Current Control

The current supplied at the HOST outputs is controlled by

two parameters:

1) the value of the programming resistor from the IREF

pin to ground (VSS), and

2) the multiplier factor determined by the logic setting of

the ISEL_0 and ISEL_1 pins.

3.1

Current Reference

The HOST output current is a mirrored and scaled copy

of the reference current flowing through the programming

resistor on the IREF pin. Conceptually, the circuit given in

Figure 2 shows how the mirror current is generated.

The voltage that appears at the IREF pin is one-third of

the voltage at the VDD_I pin. The reference current is

IREF

REF

R

I











 ×

=

VDD_I

3

1

.

3.2

Current Scaling

The mirrored reference current can be increased by

adding one or more copies of the mirror current together.

The additional current is controlled by the logic settings

on the ISEL_0 and ISEL_1 pins.

Table 6: Current Multiplier

ISEL_0

ISEL_1

MULTPLIER

00

01

10

11