M25P64-VMF6TP datasheet(31/38 Pages) STMICROELECTRONICS

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M25P64

Table 14. AC Characteristics

Note: 1. tCH + tCL must be greater than or equal to 1/ fC(max)

2. Value guaranteed by characterization, not 100% tested in production.

3. Expressed as a slew-rate.

4. Only applicable as a constraint for a WRSR instruction when SRWD is set at 1.

Test conditions specified in Table 10. and Table 11.

Symbol

Alt.

Parameter

Min.

Typ.

Max.

Unit

Clock Frequency for the following instructions: FAST_READ,

PP, SE, BE, RES, WREN, WRDI, RDID, RDSR, WRSR

D.C.

MHz

Clock Frequency for READ instructions

D.C.

MHz

tCH

(1)

tCLH

Clock High Time

tCL

(1)

tCLL

Clock Low Time

tCLCH

(2)

Clock Rise Time3 (peak to peak)

0.1

V/ns

tCHCL

(2)

Clock Fall Time3 (peak to peak)

0.1

V/ns

tSLCH

tCSS

S Active Setup Time (relative to C)

tCHSL

S Not Active Hold Time (relative to C)

tDVCH

tDSU

Data In Setup Time

tCHDX

tDH

Data In Hold Time

tCHSH

S Active Hold Time (relative to C)

tSHCH

S Not Active Setup Time (relative to C)

tSHSL

tCSH

S Deselect Time

100

tSHQZ

(2)

tDIS

Output Disable Time

tCLQV

Clock Low to Output Valid

tCLQX

tHO

Output Hold Time

tHLCH

HOLD Setup Time (relative to C)

tCHHH

HOLD Hold Time (relative to C)

tHHCH

HOLD Setup Time (relative to C)

tCHHL

HOLD Hold Time (relative to C)

tHHQX

(2)

tLZ

HOLD to Output Low-Z

tHLQZ

(2)

tHZ

HOLD to Output High-Z

tWHSL

(4)

Write Protect Setup Time

tSHWL

(4)

Write Protect Hold Time

100

Write Status Register Cycle Time

tPP

Page Program Cycle Time

1.4

tSE

Sector Erase Cycle Time

tBE

Bulk Erase Cycle Time

160

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