AD7654ASTZ datasheet(8/28 Pages) AD

8 / 28 page

Data Sheet

AD7654

Rev. D | Page 7 of 27

ABSOLUTE MAXIMUM RATINGS

Table 5.

Parameter

Values

Analog Inputs

INAx1, INBx1, REFx, INxN,

REFGND

AVDD + 0.3 V to

AGND − 0.3 V

Ground Voltage Differences

AGND, DGND, OGND

±0.3 V

Supply Voltages

AVDD, DVDD, OVDD

−0.3 V to +7 V

AVDD to DVDD, AVDD to OVDD

±7 V

DVDD to OVDD

−0.3 V to +7 V

Digital Inputs

−0.3 V to DVDD + 0.3 V

Internal Power Dissipation2

700 mW

Internal Power Dissipation3

2.5 W

Junction Temperature

150°C

Storage Temperature Range

−65°C to +150°C

Lead Temperature Range

(Soldering 10 sec)

300°C

1 See the Analog Inputs section.

2 Specification is for device in free air:

48-lead LQFP:

θJA = 91°C/W, θJC = 30°C/W.

3 Specification is for device in free air: 48-lead LFCSP; θJA = 26°C/W.

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

TO OUTPUT

60pF*

500µA

IOH

1.6mA

IOL

1.4V

*IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND

SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD

CL OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.

Figure 2. Load Circuit for Digital Interface Timing

(SDOUT, SYNC, SCLK Outputs, CL = 10 pF)

0.8V

tDELAY

0.8V

tDELAY

Figure 3. Voltage Reference Levels for Timing

ESD CAUTION

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