FEATURES GENERAL DESCRIPTION
 Supports Embedded DisplayPort (eDP) Specification
version 1.2.
 Support 2 Main Link Lanes at either 1.62Gb/s or
2.7Gb/s link rate for notebook PC applications
 Supports input color depth 6, 8-bit per pixel in RGB
format
 Supports Enhanced Framing Mode
 Support VESA and CEA timing standards up to
1920x1200 resolution in 8-bit input with 60Hz refresh
rate
 Support dynamic refresh rate switching
 Support Gamma correction
 Panel tuning methods including dithering and 6-bit +
FRC
 Fast and full Link Training for embedded DisplayPort
system
 Support eDP Authentication: Alternative Scramble Seed
Reset and Alternative Framing
 2 work modes: connect 27MHz crystal, inject 27MHz
clock
 Programmable LCD panel power sequence
 Support 18-bit Single Port, 18-bit Dual Port, 24-bit
Single Port and 24-bit Dual Port LVDS output interface
 Support both OpenLDI and SPWG bit mapping for
LVDS application
 Support panel select by GPIO pins control or writing
the chip registers.
 Flexible LVDS output pins swapping
 Blank panel during invalid input
 Supports PWM. Backlight luminance level control
through AUX channel, PWM pin and BLUP/BLDN pin
Support Dynamic Backlight Control
 Support OSD display when BLUP/BLDN pins control
Backlight Luminance
 Hot Plug Detection
 Loads Boot ROM automatically upon power up
 Serial BOOT ROM data updated through I2C bus or
AUX Channel
 Programmable power management
 EMI reduction capability for eDP input and LVDS
output. Spread spectrum control is available for
transmitting LVDS signal
 Offered in a 68-pin QFN package
Chrontel’s CH7511B is a low-cost, low-power semiconductor
device that translates the Embedded DisplayPort signal to the
LVDS (Low-voltage Differential Signaling). This innovative
DisplayPort receiver with an integrated LVDS transmitter is
specially designed to target the All-In-One PC and the notebook
market segments. Through the CH7511B’s advanced decoding /
encoding algorithm, the input eDP high-speed serialized video
data can be seamlessly converted to LVDS, a popular display
technology for high-speed serial links in mid/large-sized LCD
displays. Leveraging the eDP’s unique source/sink “Link
Training” routine, the CH7511B is capable of instantly bring up
the video display to the LCD when the initialization process is
completed between CH7511B and the graphic chip.
The CH7511B is designed to meet the Embedded DisplayPort
Specification version 1.2. In the device’s receiver block, which
supports two eDP Main Link Lanes input with data rate running
at either 1.62Gb/s or 2.7Gb/s, can accept RGB digital formats in
either 18-bit 6:6:6 or 24-bit 8:8:8 for LVDS output up to
1920x1200. To comply with GPU’s new power saving scheme
such as display frame rate reduction, the CH7511B is equipped
with the Dynamic Refresh Rate switching method, which can
automatically reduce to the low refresh rate supported by the
LVDS panel.
The integrated LVDS transmitter supports the single port and
the dual ports LVDS outputs to drive display resolution up to
WUXGA (1920x1200). CH7511B supports panel select by
GPIO[0:3] pins control or writing the chip registers. To reduce
EMI emission, the CH7511B’s LVDS encoder block has
incorporated Spread Spectrum control and its spread percentage
can be adjusted through the internal registers.
The Backlight On/Off and the PWM are two luminance control
functions designed in the CH7511B LVDS power control
module. The brightness control commands sent through AUX
Channel can be dynamically translated by CH7511B and
converted into LCD backlight control signal. The CH7511B will
save the last setting of brightness level into the BOOT ROM and
restore it upon power up. The CH7511B can dynamically adjust
backlight brigntness according to video stream to save power
consumption and it supports OSD display in this way.
The CH7511B will immediately convert the eDP signal to
LVDS output after eDP Link Training is completed. This feature
can be achieved by loading the panel’s EDID and the
CH7511B’s configuration settings in the serial BOOT ROM
connected to the CH7511B. During system power-up and upon
completion of the eDP Link Training through AUX Channel,
CH7511B will generate LVDS signal according to the panel
power-up timing sequencing stored in the BOOT ROM.