ATECC508A datasheet(41/109 Pages) MICROCHIP

41 / 109 page

Figure 6-1. Data Bit Transfer on I2C Interface

SCL

Data Line

Stable;

Data Valid

Change

of Data

Allowed

SDA

•

Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must

precede all commands.

•

Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After this

condition is received by the device, the current I/O transaction ends. On input, if the device has

sufficient bytes to execute a command, the device transitions to the busy state and begins

execution. The Stop condition should always be sent at the end of any packet sent to the device.

Figure 6-2. Start and Stop Conditions on I2C Interface

SCL

SDA

Start

Condition

Stop

Condition

•

Acknowledge (ACK): on the ninth clock cycle after every address or data byte is transferred, the

receiver will pull the SDA pin low to acknowledge proper reception of the byte.

•

Not Acknowledge (NOT ACK): alternatively, on the ninth clock cycle after every address or data

byte is transferred, the receiver can leave the SDA pin high to indicate that there was a problem

with the reception of the byte or that this byte completes the group transfer.

Figure 6-3. NOT ACK and ACK Conditions on I2C Interface

Data Output

by Receiver

SCL from

Master

Data Output

by Transmitter

Clock Pulse for

Acknowledgment

Start

Condition

Not Acknowledge

Acknowledge

Multiple ATECC508A devices can easily share the same I2C interface signals if the I2C_Address byte in

the Configuration zone is programmed differently for each device on the bus. Since all seven of the bits of

the device address are programmable, ATECC508A can also share the I2C interface with any I2C device,

including any Serial EEPROM.

ATECC508A

I2C Interface

Datasheet Complete

DS20005927A-page 41

ATECC508A 데이터시트(PDF) 41 Page - Microchip Technology

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