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FDMF6705 데이터시트(PDF) 5 Page - ON Semiconductor |
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FDMF6705 데이터시트(HTML) 5 Page - ON Semiconductor |
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5 / 21 page ![]() © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FDMF6705 • Rev. 1.0.4 4 Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VCIN, VDRV, DISB#, PWM, SMOD#, GL, THWN# to CGND Pins -0.3 6.0 V VIN to PGND, CGND Pins -0.3 30.0 BOOT, GH to VSWH, PHASE Pins -0.3 6.0 BOOT, PHASE, GH to CGND Pins -0.3 30.0 VSWH to CGND/PGND (DC Only) -0.3 30.0 VSWH to PGND (<20 ns) -8.0 33.0 BOOT to VDRV 22.0 BOOT to VDRV (<20 ns) 25.0 ITHWN# THWN# Sink Current -0.1 7.0 mA IO(AV) (1) VIN=19 V, VO=1.0 V fSW=300 kHz 38 A fSW=1 MHz 35 θJPCB Junction-to-PCB Thermal Resistance 3.5 °C/W TA Ambient Temperature Range -40 +125 °C TJ Maximum Junction Temperature +150 °C TSTG Storage Temperature Range -55 +150 °C ESD Electrostatic Discharge Protection Human Body Model, JESD22-A114 2000 V Charged Device Model, JESD22-C101 1000 Note: 1. IO(AV) is rated using Fairchild’s DrMOS evaluation board, TA = 25°C, natural convection cooling. This rating is limited by the peak DrMOS temperature, TJ = 150°C, and varies depending on operating conditions and PCB layout. This rating can be changed with different application settings. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Typ. Max. Unit VCIN Control Circuit Supply Voltage 4.5 5.0 5.5 V VDRV Gate Drive Circuit Supply Voltage 4.5 5.0 5.5 V VIN Output Stage Supply Voltage 3.0 12.0 24.0 (2) V Note: 2. Operating at high VIN can create excessive AC overshoots on the VSWH-to-GND and BOOT-to-GND nodes during MOSFET switching transients. For reliable DrMOS operation, VSWH-to-GND and BOOT-to-GND must remain at or below the Absolute Maximum Ratings shown in the table above. Refer to the “Application Information” and “PCB Layout Guidelines” sections of this datasheet for additional information. |
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