Production Specification

07/03/02

B roa dcom Co rpo rat ion

Figure 1:

Packet Processing Overview .......................................................................................................... 4

Figure 2:

Architecture Concept....................................................................................................................... 6

Figure 3:

PCI IPsec Accelerator Board - Architecture Concept...................................................................... 7

Figure 4:

Figure 5:

Structures and Linkages Used to Forward Packet/Key Setup Data to Chip ................................. 13

Figure 6:

144-Pin DQFP Package Drawing.................................................................................................. 40