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DS3152 데이터시트(PDF) 32 Page - Dallas Semiconductor

부품명 DS3152
상세설명  Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
PDF  60 Pages
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제조업체  DALLAS [Dallas Semiconductor]
홈페이지  https://www.maximintegrated.com/en.html
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DS3152 데이터시트(HTML) 32 Page - Dallas Semiconductor

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DS3151/DS3152/DS3153/DS3154 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
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12.
JTAG TEST ACCESS PORT AND BOUNDARY SCAN
12.1 JTAG Description
The DS315x LIUs support the standard instruction codes SAMPLE/PRELOAD, BYPASS, and EXTEST. Optional
public instructions included are HIGHZ, CLAMP, and IDCODE. Figure 12-1 features a block diagram. The LIUs
contain the following items, which meet the requirements set by the IEEE 1149.1 Standard Test Access Port and
Boundary Scan Architecture:
Test Access Port (TAP)
TAP Controller
Instruction Register
Bypass Register
Boundary Scan Register
Device Identification Register
The TAP has the necessary interface pins, namely JTCLK,
JTRST, JTDI, JTDO, and JTMS. Details on these pins
can be found in Section 4. Details about the boundary scan architecture and the TAP can be found in IEEE 1149.1-
1990, IEEE 1149.1a-1993, and IEEE 1149.1b-1994.
Figure 12-1. JTAG Block Diagram
BOUNDARY
SCAN
REGISTER
IDENTIFICATION
REGISTER
BYPASS
REGISTER
INSTRUCTION
REGISTER
TEST ACCESS PORT
CONTROLLER
SELECT
TRI-STATE
JTDI
10k
JTMS
10k
JTCLK
JTRST
10k
JTDO



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