Kawasaki USB device

KL5KUSB201

Copyright © 2002 Kawasaki Microelectronics Inc. Kawasaki LSI Inc. All rights reserved.

9.3 KL5BUDV002 LSI (U2PCI)

The KL5BUDV002 LSI is USB2.0 to PCI adapter chip, which consists of HS_SIE block,

PCI Interface block and data buffer RAM. With KL5KUSB201, chipset performs data

transfer with high throughput between USB2.0 and PCI bus. The chipset makes it easy

to build up a USB2.0 device system. Main feature of KL5BUDV002 LSI is as follows.

1. Directly connected with KL5KUSB201 and realizes USB2.0 data transfer in both

High Speed and Full Speed

2. Includes HS_SIE function and support up to 4 endpoints

Endpoint 0

Control Transfer

64Bytes buffer

Endpoint 1

Bulk OUT

512Bytes x2 buffers

Endpoint 2

Bulk IN

512Bytes x2 buffers

Endpoint 5

Interrupt IN

8Bytes buffer

（option）

3. Includes 33MHz, 32bit PCI bus interface

Target single access for memory mapped register access

Master burst access with 2 DMA master controllers for memory access

4. Independent Data buffers for data transmit and receive

5. USB configuration transfer is controlled by the external PCI controller.

Figure 9-3-1 KL5BUDV002 Symbol

KL5BUDV002

SIE bus

PCI bus

IDSEL

REQN

CLK

INTAN

AD[31:0]

TRDYN

TESTO

RSTN

GNTN

CKOUT

FS_HSN

RXACT

RXVLD

TXACT

TXRDY

SIE_DAT[15:0]

WDVLD

BSTAT[1:0]

URSTN

SUSPN

MODE[3:0]

CRCACT

CRCERR

RXERR

PU_SE0N

CBEN[3:0]

FRAMEN

IRDYN

Misc bus

PMODE[2:0]

TESTI[3:0]

PAR

DEVSELN

STOPN

VBDET

USB