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USB375X 데이터시트(PDF) 21 Page - Microchip Technology |
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USB375X 데이터시트(HTML) 21 Page - Microchip Technology |
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21 / 31 page ![]() 2011 - 2014 Microchip Technology Inc. DS00001824A-page 21 USB375x 4.4.6 REG 2: BATTERY CHARGER REGISTER These bits allow I2C control of the battery charger circuits. This will allow for custom defined charger detection algorithm to be implemented. By default the I2C control bit is off and this register is under control of the charger detection state machine. Once the charger detection state machine is complete the I2C master can set the I2C Control register to control the charger detection circuits. 4.4.7 REG 3: BATTERY CHARGER STATUS REGISTER Field Name Bit Access Default Description SeRxEn 0 r/w 0 Single Ended Receiver Enable. Wen this bit is set to 1b the single ended receivers will be enabled ContactDetectEn 1 r/w 0 Contact Detect Current Source Enable. When this bit is set to 1b the IDP_SRC current source shown in Figure 4-3 will be enabled. VdatSrcEn 2 r/w 0 Vdat voltage source enable. When this bit is set to 1b the VdatSrc voltage source shown in Figure 4-3 will be enabled. HostChrgEn 3 r/w 0 When this bit is set to 1b, the charger detection connections of DP and DM are swapped. The USB signal path is not reversed. This is required when differentiating between a Charging Downstream Port (CDP) and a Dedicated Charging Port (DCP). IdatSinkEn 4 r/w 0 Idat current sink enable. When this bit is set to 1b the IdatSinkEn current source shown in Figure 4-3 will be enabled. DpPulldownEn 5 r/w 0 DP 15K pull down resistor enable. When this bit is set to 1b the RPD 15K pull down resistor on DP shown in Figure 4-3 will be enabled. DmPulldownEn 6 r/w 0 DM 15K pull down resistor enable. When this bit is set to 1b the RPD 15K pull down resistor on DM shown in Figure 4-3 will be enabled. I2C Control 7 r/w 0 When this bit is set to 0b the bits [6:0] are disconnected from the Battery Charger circuits. When this bit is set to 1b, bits [6:0] will control the charger detection circuits. Field Name Bit Access Default Description VdatDet 0 rd 0 Indicates Vdat Det comparator output. A 1b indicates that the VdatDet comparator shown in Figure 4-3 has been tripped. DpSeRx 1 rd 0 DP Single Ended Receiver Status. A 1b indicates that the DP signal is above the VSE_RX threshold. DmSeRx 2 rd 0 DM Single Ended Receiver Status. A 1b indicates that the DM signal is above the VSE_RX threshold. RxHiCurrent 3 rd 0 DM high current SE1 charger output. A 1b indicates that the DM signal is above the VSE_RXH threshold. Reserved 7:4 r 0000 Read Only. |
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