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STR710FZ1H6 데이터시트(PDF) 38 Page - STMicroelectronics |
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STR710FZ1H6 데이터시트(HTML) 38 Page - STMicroelectronics |
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38 / 49 page ![]() STR71xF - ELECTRICAL CHARACTERISTICS 38/49 2.10 External Memory Bus Timing V33 = 3.3 ± 10%, TA = -40 / 85 °C unless otherwise specified. The tables below use a variable which is derived from the EMI_BCONn registers (described in the STR71x Reference Manual) and represents the special characteristics of the programmed memory cycle. Table 21. EMI Read Operation See Figure 10, Figure 11, Figure 12and Figure 13 for related timing diagrams. Table 22. EMI Write Operation See Figure 14, Figure 15, Figure 16 and Figure 17 for related timing diagrams. Symbol Parameter Value tMCLK CPU clock period 1 / fMCLK tC Memory cycle time wait states tMCLK x (1 + [C_LENGTH]) Symbol Parameter Test Conditions Value Unit Min Typ Max tRCR Read to CSn Removal Time tMCLK ns tRP Read Pulse Time tC ns tRDS Read Data Setup Time 3 ns tRDH Read Data Hold Time 3 ns tRAS Read Address Setup Time 1.3*tMCLK ns tRAH Read Address Hold Time 3 ns tRAT Read Address Turnaround Time 3 ns tRRT RDn Turnaround Time tMCLK ns Symbol Parameter Test Conditions Value Unit Min Typ Max tWCR WEn to CSn Removal Time tMCLK ns tWP Write Pulse Time tC ns tWDS Write Data Setup Time 3 ns tWDH Write Data Hold Time 3 ns tWAS Write Address Setup Time 1.3*tMCLK ns tWAH Write Address Hold Time 3 ns tWAT Write Address Turnaround Time 3 ns tWWT WEn Turnaround Time tMCLK ns |
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