MP2624GL datasheet(43/45 Pages) MPS

43 / 45 page

MP2624 – 4.5A SW CHARGER W/ I2C CONTROL, NVDC POWER PATH, USB OTG

MP2624 Rev.1.05

www.MonolithicPower.com

4/9/2018

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

PCB Layout Guidelines

Efficient PCB layout is critical to meet specified

noise

rejection

requirements

and

improve

efficiency. For best results follow the guidelines

below:

1) Route the power stage adjacent to the

grounds. Aim to minimize the high-side switching

node (SW, inductor) trace lengths in the high-

current paths and the current sense resistor trace.

2) Keep the switching node short and away from

all small control signals, especially the feedback

network.

3) Place the input capacitor as close as possible

to PMID and PGND.

4) Place the output inductor close to the IC and

connect the output capacitor between the

inductor and PGND of the IC.

5) For high-current applications, the pins for the

power pads (IN, SW, SYS, BATT, and PGND)

should be connected to as much copper on the

board as possible. This improves thermal

performance because the board conducts heat

away from the IC.

6) Connect the PCB ground plane directly to the

return of all components via holes. Also, it is

recommended to place it, via holes, inside the

PGND pads for the IC, if possible. Typically, a

star ground design approach is used to keep

circuit block currents isolated (high-power/low-

power small signals), which reduces noise

coupling and ground-bounce issues. A single

ground plane for this design gives good results.

With this small layout and a single ground plane,

there is no ground-bounce issue; segregating the

components minimizes coupling between the

signals and stability requirements.

4) Pull the connection wire from the MCU (I2C)

far away from the SW mode and cooper regions.

SCL and SDA should be closely in parallel.

MP2624GL 데이터시트(PDF) 43 Page - Monolithic Power Systems

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