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CS61582 데이터시트(PDF) 5 Page - Cirrus Logic

부품명 CS61582
상세설명  DUAL T1/E1 LINE INTERFACE
PDF  32 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS61582 데이터시트(HTML) 5 Page - Cirrus Logic

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ANALOG SPECIFICATIONS (TA = -40 to 85 °C; power supply pins within ±5% of nominal)
Parameter
Min
Typ
Max
Units
Transmitter
AMI Output Pulse Amplitudes
(Note 16)
E1, 75
Ω
(Note 17)
E1, 120
Ω
(Note 18)
T1, DSX-1
(Note 19)
2.14
2.7
2.4
2.37
3.0
3.0
2.6
3.3
3.6
V
V
V
Recommended Transmitter Output Load
(Note 16)
T1
E1, 75
Ω
E1, 120
Ω
-
-
-
76.6
57.4
90.6
-
-
-
Ω
Ω
Ω
Jitter Added During
10 Hz - 8 kHz
Remote Loopback
8 kHz - 40 kHz
10 Hz - 40 kHz
Broad Band
(Note 20)
-
-
-
-
0.005
0.008
0.010
0.015
-
-
-
-
UI
UI
UI
UI
Power in 2 kHz band about 772 kHz
(Notes 14 and 21)
(DSX-1 only)
12.6
15
17.9
dBm
Power in 2 kHz band about 1.544 MHz
(Notes 14 and 21))
(referenced to power in 2 kHz band at 772 kHz)
(DSX-1 only)
-29
-38
-
dB
Positive to Negative Pulse Imbalance
(Notes 14 and 21)
T1, DSX-1
E1, amplitude at center of pulse interval
E1, width at 50% of nominal amplitude
-
-5
-5
0.2
-
-
0.5
+5
+5
dB
%
%
Transmitter Return Loss
(Notes 14, 21, and 22)
51 kHz - 102 kHz
102 kHz - 2.048 MHz
2.048 MHz - 3.072 MHz
18
14
10
25
18
12
-
-
-
dB
dB
dB
E1 Short Circuit Current
(Note 23)
-
-
50
mArms
E1 and DSX-1 Output Pulse Rise/Fall Times
(Note 24)
-
25
-
ns
E1 Pulse Width (at 50% of peak amplitude)
-
244
-
ns
E1 Pulse Amplitude
E1, 75
Ω
for a space
E1, 120
Ω
-0.237
-0.3
-
-
0.237
0.3
V
V
Notes: 16. Using a transformer that meets the specifications in the Applications section.
17. Measured across 75
Ω at the output of the transmit transformer for CON2/1/0 = 0/0/0.
18. Measured across 120
Ω at the output of the transmit transformer for CON2/1/0 = 0/0/1.
19. Measured at the DSX-1 cross-connect for line length settings CON2/1/0 = 0/1/0, 0/1/1,
1/0/0, 1/0/1, and 1/1/0 after the appropriate length of #22 ABAM cable specified in Table 1.
20. Input signal to RTIP/RRING is jitter free. Values will reduce slightly if jitter free clock is input to TCLK.
21. Typical performance using the line interface circuitry recommended in the Applications section.
22. Return loss = 20 log 10 ABS((z1+z0)/(z1-z0)) where z1=impedance of the transmitter or receiver, and
z0=cable impedance.
23. Transformer secondary shorted with 0.5
Ω resistor during the transmission of 100% ones.
24. At transformer secondary and measured from 10% to 90% of amplitude.
DS224PP1
5



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