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SSM2518CPZ-R7 데이터시트(PDF) 45 Page - Analog Devices

부품명 SSM2518CPZ-R7
상세설명  Digital Input Stereo, 2 W, Class-D Audio Power Amplifier
PDF  48 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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SSM2518CPZ-R7 데이터시트(HTML) 45 Page - Analog Devices

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Datasheet
SSM2518
Rev. B | Page 45 of 48
Bits
Bit Name
Settings
Description
Reset
Access
1010
341.12 ms
1011
682.24 ms
1100
1.364 sec
1101
Reserved
1110
Reserved
1111
Reserved
DRC CONTROL 8 REGISTER
Address: 0x11, Reset: 0x1C, Name: DRC_Control_8
Table 30. Bit Descriptions for DRC_Control_8
Bits
Bit Name
Settings
Description
Reset
Access
[7:6]
RESERVED
Reserved.
0x0
RW
[5:2]
DRC_POST_G
Post-DRC Gain Adjust Setting. This can be used to add additional gain
after the DRC function to compensate for the overall reduction of system
gain due to the DRC.
0x7
RW
0000
+21 dB
0001
+18 dB
0010
+15 dB
0011
+12 dB
0100
+9 db
0101
+6 dB
0110
+3 dB
0111
0 dB
1000
−3 dB
1001
−6 dB
1010
−9 dB
1011
−12 dB
1100
−15 dB
1101
−18 dB
1110
−21 dB
1111
−24 dB
[1:0]
RESERVED
Reserved.
0x0
RW



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