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SLDM-06D1AX 데이터시트(PDF) 43 Page - Bel Fuse Inc. |
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SLDM-06D1AX 데이터시트(HTML) 43 Page - Bel Fuse Inc. |
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43 / 49 page ![]() SLDM-06D1Ax 43 Asia-Pacific +86 755 298 85888 Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2016 Bel Power Solutions & Protection Rev. AC 57. EXAMPLE APPLICATION CIRCUIT Requirements: Vin: 12V Vout: 1.8V Iout: 4.5A max., worst case load transient is from 3A to 4.5A Vout: 1.5% of Vout (27mV) for worst case load transient Vin, ripple 1.5% of Vin (180mV, p-p) CI1 Decoupling cap - 1x0.047 F/16V ceramic capacitor (e.g. Murata LLL185R71C473MA01) CI2 2x22 F/16V ceramic capacitor (e.g. Murata GRM32ER61C226KE20) CI3 470 F/16V bulk electrolytic CO1 Decoupling cap - 1x0.047 F/16V ceramic capacitor (e.g. Murata LLL185R71C473MA01) + 0.1uF/16V 0402size ceramic capacitor CO2 4x47 F/6.3V ceramic capacitor CO3 - CTune 2200pF ceramic capacitor (can be 1206, 0805 or 0603 size) RTune 300 ΩSMT resistor (can be 1206, 0805 or 0603 size) RTrim 10k SMT resistor (can be 1206, 0805 or 0603 size, recommended tolerance of 0.1%) Note: The DATA, CLK and SMBALRT pins do not have any pull-up resistors inside the module. Typically, the SMBus master controller will have the pull-up resistors as well as provide the driving source for these signals. RADDR0 DATA SEQ VS- RADDR1 GND Vin+ CI3 CO3 ADDR0 VOUT VS+ GND TRIM CTUNE RTUNE RTrim VIN CO1 CI1 Vout+ ON/OFF SEQ SMBALRT# MODULE PGOOD ADDR1 SIG_GND SYNC CI2 CO2 |
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