NET2890 datasheet(46/73 Pages) ETC

46 / 73 page

Specification

NET2890 USB Interface Controller

____________________________________________________________________________________

NetChip Technology, Inc., 1999

335 Pioneer Way, Mountain View, California 94041

TEL (650) 526-1490

FAX (650) 526-1494

http://www.netchip.com

Rev 2.0, Draft 9, July 16, 1999

5.4.6 (Address 15h; EPUSBSTAT) Endpoint USB Status Register (one per

Endpoint)

Bits

Description

Read

Write

Default

Value

Timeout. For an IN endpoint, the last USB packet transmitted was not acknowledged

by the Host PC, indicating a bus error. The Host PC will expect the same packet to

be retransmitted in response to the next IN token. For an OUT endpoint, the last USB

packet received had a CRC or bit-stuffing error, and was not acknowledged by the

NET2890. The packet will be retransmitted by the Host PC. Writing a 1 clears this

bit.

Yes

Yes/CLR

USB STALL Sent. The last USB packet could not be accepted or provided because

the endpoint was stalled, and was acknowledged with a STALL. Writing a 1 clears

this bit.

Yes

Yes/CLR

USB IN NAK Sent. The last USB IN packet could not be provided, and was

acknowledged with a NAK. Writing a 1 clears this bit.

Yes

Yes/CLR

USB IN ACK Rcvd. The last USB IN data packet transferred was successfully

acknowledged with an ACK from the host. Writing a 1 clears this bit.

Yes

Yes/CLR

USB OUT NAK Sent. The last USB OUT data packet could not be accepted, and

was acknowledged with a NAK to the host. If retries are disabled, the FIFO data may

be corrupted and the local CPU should flush the FIFO. Writing a 1 clears this bit.

Yes

Yes/CLR

USB OUT ACK Sent. The last USB OUT data packet transferred was successfully

acknowledged with an ACK to the host. Writing a 1 clears this bit.

Yes

Yes/CLR

Short Packet Transferred. The length of the last packet was less than the Maximum

Packet Size (EPnPKTSIZ). Writing a 1 clears this bit.

Yes

Yes/CLR

Reserved.

Yes

5.4.7 (Address 16h; EPDOUT) Endpoint Data Out Register (one per Endpoint)

Bits

Description

Read

Write

Default

Value

7:0

Endpoint Data Out Register. For an OUT endpoint, this register is used by the local

CPU to read data from the endpoint’s FIFO. This register is unused for an IN

endpoint.

Yes

5.4.8 (Address 17h; EPDIN) Endpoint Data In Register (one per Endpoint)

Bits

Description

Read

Write

Default

Value

7:0

Endpoint Data In Register. For an IN endpoint, this register is used by the local

CPU to write data to the endpoint’s FIFO. This register is unused for an OUT

endpoint.

Yes

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