NET2890 datasheet(11/73 Pages) ETC

11 / 73 page

Specification

NET2890 USB Interface Controller

____________________________________________________________________________________

NetChip Technology, Inc., 1999

335 Pioneer Way, Mountain View, California 94041

TEL (650) 526-1490

FAX (650) 526-1494

http://www.netchip.com

Rev 2.0, Draft 9, July 16, 1999

PKTLENLSB

•

Moved from Index register 5 to Base register 0Bh.

PKTLENMSB

•

Moved from Index register 6 to Base register 0Ch.

FIFOBASE

•

FIFOSIZE

•

FIFOCTL

•

Moved to Endpoint paged registers address 1Ch.

•

“Fifo Enable” bit, “Endpoint Select”bits are obsolete.

•

FIFO Valid Bit removed, moved to FIFOSTAT.

FIFOINTENB

•

Removed. Interrupt enables moved to EPIRQENB register.

FIFOSTAT

•

Moved to Endpoint registers address 1Eh.

•

“FIFO Valid” bit added, changed to Yes/SET with Auto-Clear feature.

•

FIFO Almost Full and Almost Empty interrupts moved to EPIRQSTAT register.

FIFOCNT

•

Moved to Endpoint paged registers address 1Ah.

EPRSPSET

•

“Zero-Length Packet Response” bit is obsolete.

•

“Endpoint Stall” and “Endpoint Toggle” bits have been swapped. See the description in

Section 5, Registers.

EPRSPCLR

•

“Zero-Length Packet Response” bit is obsolete.

•

“Endpoint Stall” and “Endpoint Toggle” bits have been swapped. See the description in

Section 5, Registers.

EPIRQENB

•

Bits have been re-arranged to simplify software. See Section 5, Registers.

EPUSBSTAT

•

Transmit Register Valid, Receive Register Valid bits are obsolete.

•

“Timeout” status bit and Short Packet Transferred added.

IRQENB2

•

FIFO interrupt enables moved to EPIRQENB register.

INDEX2

•

Removed.

MINDEX1

•

Removed.

MINDEX2

•

Removed.

DIAG

•

Added new index register to control diagnostic features.

EPnPKTSIZE

•

Added new maximum packet size registers (Index 10h to 19h).

FIFOETHRS

•

Renamed Fn_AETH. The FIFO almost empty threshold registers have been moved from

the Endpoint/FIFO registers to the index registers.

FIFOFTHRS

•

Renamed Fn_AFTH. The FIFO almost full threshold registers have been moved from the

Endpoint/FIFO registers to the index registers.

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