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AD5721 데이터시트(PDF) 17 Page - Analog Devices |
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AD5721 데이터시트(HTML) 17 Page - Analog Devices |
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17 / 31 page ![]() Data Sheet AD5761/AD5721 Rev. C | Page 17 of 31 2 20ms/DIV 10V 5V 20mV 10V VDD VOUT VSS VREFIN Figure 49. Power-Up Glitch 200µs/DIV 5V 5V 1V 5V SCLK SYNC SDI VOUT Figure 50. Software Full Reset Glitch from Full Scale with Output Loaded, 0 V to 5 V Range SCLK 200µs/DIV 5V 5V 500mV 5V SYNC SDI VOUT Figure 51. Software Full Reset Glitch from Midscale with Output Loaded, 0 V to 5 V Range SCLK SYNC SDI VOUT 200µs/DIV 5V 5V 200mV 5V Figure 52. Software Full Reset Glitch from Zero Scale with Output Loaded, 0 V to 5 V Range SCLK 200µs/DIV 5V 5V 2V 5V SYNC SDI VOUT Figure 53. Software Full Reset Glitch from Full Scale with Output Loaded, ±10 V Range SCLK 200µs/DIV 5V 5V 500mV 5V SYNC SDI VOUT Figure 54. Software Full Reset Glitch from Midscale with Output Loaded, ±10 V Range |
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