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M36LLR876B0 데이터시트(PDF) 10 Page - STMicroelectronics

부품명 M36LLR876B0
상세설명  256 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
PDF  19 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M36LLR876B0 데이터시트(HTML) 10 Page - STMicroelectronics

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M36LLR8760T1, M36LLR8760D1, M36LLR8760M1, M36LLR8760B1
10/19
Table 2. Main Operating Modes
Note: 1. X = Don't care.
2. LF can be tied to VIH if the valid address has been previously latched.
3. Depends on GF.
4. WAIT signal polarity is configured using the Set Configuration Register command. See the M30L0R8000(T/B)0 and
M30L0R8000(T/B)0 datasheets for details.
5. EF is either EF1 or EF2, and GF is either GF1 or GF2 according to the Flash memory enabled. Only one Flash memory can be enabled
at a time.
Operation
EF
(5)
GF(5) WF
LF
RPF
WAITF
(4)
EP
CRP
GP
WP
LBP,UBP
DQ15-DQ0
Flash Read
VIL
VIL
VIH
VIL
(2)
VIH
PSRAM must be disabled.
Only one Flash memory can be
enabled at a time.
Flash Data Out
Flash Write
VIL
VIH
VIL
VIL
(2)
VIH
Flash Data In
Flash Address
Latch
VIL
X
VIH
VIL
VIH
Flash Data Out
or Hi-Z (3)
Flash Output
Disable
VIL
VIH
VIH
X
VIH
Any PSRAM mode is allowed.
Both Flash memories must be
disabled.
Hi-Z
Flash Standby
VIH
XX
X
VIH
Hi-Z
Hi-Z
Flash Reset
X
X
X
X
VIL
Hi-Z
Hi-Z
PSRAM Read
Both Flash memories must be disabled
VIL
VIL
VIL
VIH
VIL
PSRAM data
out
PSRAM Write
VIL
VIL
X
VIL
VIL
PSRAM data in
PSRAM Write
Configuration
Register
VIL
VIH
VIH
VIL
X
PSRAM data in
PSRAM
Standby
Any Flash memory mode is allowed. Only
one Flash memory can be enabled at a time
VIH
VIL
X
X
X
Hi-Z
PSRAM Deep
Power-Down
VIH
XXX
X
Hi-Z



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