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CS5396 데이터시트(PDF) 16 Page - Cirrus Logic

부품명 CS5396
상세설명  120 dB, 96 kHZ Audio A/D Converter
PDF  40 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5396 데이터시트(HTML) 16 Page - Cirrus Logic

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CS5396 CS5397
16
DS229PP2
SDATA
P1 P0
24 23
9
P7 P6 P5 P4 P3 P2
8
24 23
SCLK
LRCK
P1 P0
24 23
9
P7 P6 P5 P4 P3 P2
8
MASTER
24-Bit Left Justified Data
Data Valid on Rising Edge of 64x SCLK
MCLK equal to 256x Fs
SLAVE
24-Bit Left Justified Data
Data Valid on Rising Edge of SCLK
MCLK equal to 256x Fs
10
32
54
76
76
54
32
10
Left
Right
Figure 4. Control Port Mode, Serial Data. Left Justified. 64x Oversampling Mode
The peak signal level bits are available only if Bit 6 of Byte 7 is set.
SCLK
LRCK
MASTER
I S 24-Bit Data
Data Valid on Rising Edge of 64x SCLK
MCLK equal to 256x Fs
2
SLAVE
I S 24-Bit Data
Data Valid on Rising Edge of SCLK
MCLK equal to 256x Fs
2
SDATA
P1 P0
24 23
9
P7 P6 P5 P4 P3 P2
8
24 23
P1 P0
24 23
9
P7 P6 P5 P4 P3 P2
8
10
32
54
76
76
54
32
10
Left
Right
Figure 5. Control Port Mode, Serial Data. I
2S Compatible. 64x Oversampling Mode.
The peak signal level bits are available only if Bit 6 of Byte 7 is set.
SDATA
P1 P0
23 22
P7 P6 P5 P4 P3 P2
SCLK
LRCK
23 22
MASTER
24-Bit Left Justified Data
Data Valid on Rising Edge of 128x SCLK
MCLK equal to 512x Fs
SLAVE
24-Bit Left Justified Data
Data Valid on Rising Edge of SCLK
MCLK equal to 512x Fs
10
P1 P0
P7 P6 P5 P4 P3 P2
23 22
10
Left
Right
Figure 6. Control Port Mode, Serial Data. Left Justified. 128x Oversampling Mode
The peak signal level bits are available only if Bit 6 of Byte 7 is set.
SDATA
P1 P0
23 22
P7 P6 P5 P4 P3 P2
SCLK
23 22
10
P1 P0
P7 P6 P5 P4 P3 P2
23 22
10
LRCK
MASTER
I S 24-Bit Data
Data Valid on Rising Edge of 128x SCLK
MCLK equal to 512x Fs
2
SLAVE
I S 24-Bit Data
Data Valid on Rising Edge of SCLK
MCLK equal to 512x Fs
2
Left
Right
Figure 7. Control Port Mode, Serial Data. I2S Compatible. 128x Oversampling Mode.
The peak signal level bits are available only if Bit 6 of Byte 7 is set.



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