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SYNPWM 데이터시트(PDF) 15 Page - Feeling Technology Corp. |
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SYNPWM 데이터시트(HTML) 15 Page - Feeling Technology Corp. |
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15 / 57 page ![]() FM8P73B Web site: http://www.feeling-tech.com.tw Rev1.0 Nov 20, 2013 P.15/FM8P73B FEELING TECHNOLOGY 2.1.7 Timer2: 8-bit Timer & PWM1 Duty The Timer2 is an 8-bit down-count timer which include latch register. Please refer to 2.3 for detail Timer description. 2.1.7.1 T2CON (Timer2 Control Register) Address Name B7 B6 B5 B4 B3 B2 B1 B0 0Fh (r/w) T2CON T2EN T2LOAD T2SO1 T2SO0 T2EDG T2PS2 T2PS1 T2PS0 T2EN : TMR2 Enable/Disable = 1, TMR2 (PWM1) Enable. = 0, TMR2 (PWM1) Disable. Note: At PWM mode, Timer2 is controlled by T1EN. T2LOAD : Enable/Disable Latch Buffer automatically load to counter register while writing to latch register = 1, Enable TMR2 latch buffer automatically load to counter register while writing to latch register. = 0, Disable TMR2 latch buffer automatically load to counter register while writing to latch register. Note: This bit is only affected after latch register written. When the timer underflows, the latch register data will automatically load into counter register. T2SO1:T2SO0 : TMR2 clock source selection T2SO1 T2SO0 TMR2 clock source 0 0 TMCKI(IOB2) 0 1 Internal instruction clock cycle 1 0 Fosc 1 1 Fosc*2 T2EDG : TMR2 clock edge selection. This bit works only when external clock source TMCKI (IOB2) selected. = 0, TMR2 increased on rising edge of TMCKI pin. = 1, TMR2 increased on falling edge of TMCKI pin. T2PS2:T2PS0 : TMR2 Prescaler selection T2PS2 : T2PS0 TMR2 Prescal rate 0 0 0 1:1 0 0 1 1:2 0 1 0 1:4 0 1 1 1:8 1 0 0 1:16 1 0 1 1:32 1 1 0 1:64 1 1 1 1:128 2.1.7.2 T2LA (Timer2 Latch Register) Address Name B7 B6 B5 B4 B3 B2 B1 B0 10h (r/w) T2LA 8-bit real-time timer Latch T2LA is a Timer2 pre-set latch buffer, see 2.3 for detail description. |
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