IP175G datasheet(32/69 Pages) ETC2

32 / 69 page

IP175G/GI/GH/GHI

Data Sheet

32 / 69

November 27, 2012

IP175Gx-DS-R01.3

PHY

MII

R/W

Description

Default

Status Register

1.1

Jabber Detect

1 = jabber condition detected

0 = no jabber condition detected

When read as logic 1, indicates that IP175G/GH has detected a

jabber condition. This bit is always 0 for 100Mbps operation and is

cleared after IP175G/GH reset. When the duration of TXEN exceeds

the jabber timer (21ms), the transmission and loop back functions will

be disabled and the COL is active. After TXEN goes low for more than

500 ms, the transmitter will be re-enabled.

1.0

Extended capability

1 = Extended register capabilities

0 = No extended register capabilities

IP175G/GH has extended register capabilities.

PHY

MII

R/W

Description

Default

PHY Identifier 1 Register

IP175G/GH OUI (Organizationally Unique Identifier) ID, the MSB is 3

bit of IP175G/GH OUI ID, and the LSB is 18

th bit of IP175G/GH OUI

ID. IP175G/GH OUI is 0090C3.

16’h0243

PHY

MII

R/W

Description

Default

PHY Identifier 2 Register

3[15:10]

PHY identifier

IP175G/GH OUI ID, the MSB is 19

th bit of IP175G/GH OUI ID, and

LSB is 24

th bit of IP175G/GH OUI ID.

6’h03

3[9:4]

Manufacture’s Model Number

IP175G/GH model number

6’h18

3[3:0]

Revision Number

IP175G/GH revision number

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