| 전자부품 데이터시트 검색엔진 |
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L6710 데이터시트(PDF) 20 Page - STMicroelectronics |
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L6710 데이터시트(HTML) 20 Page - STMicroelectronics |
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20 / 34 page ![]() L6710 20/34 The worst condition depends on the input voltage available and the output voltage selected. Anyway the worst case is the response time after removal of the load with the minimum output voltage programmed and the maximum input voltage available. MAIN CONTROL LOOP The control loop is composed by the Current Sharing control loop and the Average Current Mode control loop. Each loop gives, with a proper gain, the correction to the PWM in order to minimize the error in its regulation: the Current Sharing control loop equalize the currents in the inductors while the Average Cur- rent Mode control loop fixes the output voltage equal to the reference programmed by VID. Figure 13 re- ports the block diagram of the main control loop. Figure 13. Main Control Loop Diagram Current Sharing (CS) Control Loop Active current sharing is implemented using the information from Tran conductance differential amplifier in an average current mode control scheme. A current reference equal to the average of the read current (IAVG) is internally built; the error between the read current and this reference is converted to a voltage with a proper gain and it is used to adjust the duty cycle whose dominant value is set by the error amplifier at COMP pin (See fig. 14). The current sharing control is a high bandwidth control loop allowing current sharing even during load tran- sients. The current sharing error is affected by the choice of external components; choose precise Rg resistor (±1% is necessary) to sense the current. The current sharing error is internally dominated by the voltage offset of Tran conductance differential am- plifier; considering a voltage offset equal to 2mV across the sense resistor, the current reading error is given by the following equation t app lic atio n L ∆I ⋅ V IN V OUT – ------------------------------ t re m ov al L ∆I ⋅ V OUT -------------- = = L1 L2 + + PWM1 1/5 + - 1/5 IINFO2 IINFO1 4/5 ZF(S) PWM2 CO FB COMP RO ERROR AMPLIFIER REFERENCE PROGRAMMED BY VID CURRENT SHARING DUTY CYCLE CORRECTION RFB D02IN1392 ∆I REA D I MAX -------------------- 2mV R SENSE I MAX ⋅ --------------------------------------- = |
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