GD25S512MDBJS datasheet(28/87 Pages) GIGADEVICE

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3.3V Uniform Sector

Dual and Quad Serial Flash

GD25S512MD

Figure 15 Read Data with 4-Byte Address Sequence Diagram (ADS=0 or ADS=1)

7.11.

Read Data Bytes at Higher Speed (Fast Read 0BH or 4Fast Read 0CH)

The Read Data Bytes at Higher Speed (Fast Read) command is for quickly reading data out. It is followed by a 3-Byte

address (A23-A0) and a dummy Byte, and each bit being latched-in on the rising edge of SCLK. Then the memory content,

at that address, is shifted out on SO, and each bit being shifted out, at a Max frequency fC, on the falling edge of SCLK. The

first Byte addressed can be at any location. The address is automatically incremented to the next higher address after each

Byte of data is shifted out.

Figure 16 Read Data Bytes at Higher Speed Sequence Diagram (ADS=0)

Command

0BH

CS#

SCLK

High-Z

9 10

28 29 30 31

23 22 21

24-bit address

MSB

34 35 36 37

38 39

Data Out1

42 43 44 45

46 47

Data Out2

CS#

SCLK

MSB

Dummy Byte

Command

13H

CS#

SCLK

High-Z

9 10

36 37 38 39 40

MSB

42 43 44 45

31 30 29

46 47

32-bit address

MSB

Data Out1

Data Out2

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