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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TPS65982ABZBHR 데이터시트(PDF) 80 Page - Texas Instruments |
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TPS65982ABZBHR 데이터시트(HTML) 80 Page - Texas Instruments |
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80 / 121 page  I2C_ADDR 5 µA R_I2C DEBUG_CTL1 DEBUG_CTL2 Debug Data To Address Decoder To Address Decoder Tristate ADC 80 TPS65982 SLVSD02D – MARCH 2015 – REVISED JUNE 2019 www.ti.com Product Folder Links: TPS65982 Submit Documentation Feedback Copyright © 2015–2019, Texas Instruments Incorporated Figure 76. I2C Address Decode Table 10 lists the external resistance needed to set bits [3:1] of the I2C Unique Address. For the Primary TPS65982 (UART Master), the I2C_ADDR pin is grounded and this TPS65982 is connected to the SPI Flash. In a two Type-C port system sharing one SPI Flash, I2C_ADDR is left as an open-circuit (UART Slave 1) and this TPS65982 is referred to as the Secondary. Table 10. I2C Address Resistance TPS65982 DEVICE EXTERNAL RESISTANCE (1%) I2C UNIQUE ADDRESS [3:1] SPI Owner, UART Master 0 (Primary) 0 Ω 0x00 UART Slave 7 38.3 kΩ 0x01 UART Slave 6 84.5 kΩ 0x02 UART Slave 5 140 kΩ 0x03 UART Slave 4 205 kΩ 0x04 UART Slave 3 280 kΩ 0x05 UART Slave 2 374 kΩ 0x06 UART Slave 1 (Secondary) Open 0x07 |
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