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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TPS65982ABZBHR 데이터시트(PDF) 95 Page - Texas Instruments |
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TPS65982ABZBHR 데이터시트(HTML) 95 Page - Texas Instruments |
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95 / 121 page  95 TPS65982 www.ti.com SLVSD02D – MARCH 2015 – REVISED JUNE 2019 Product Folder Links: TPS65982 Submit Documentation Feedback Copyright © 2015–2019, Texas Instruments Incorporated Layout Guidelines (continued) Figure 89. Top View Alternate TPS65982 Footprint (Oval Pads) Figure 90. Oval Pad Sizing Figure 91. Recommended Minimum Via Sizing 12.1.3 Top TPS65982 Placement and Bottom Component Placement and Layout When the TPS65982 is placed on top and its components on bottom the solution size will be at its smallest. For systems that do not use the optional external FET path the solution size will average less than 64 mm2 (8 mm × 8 mm). Systems that implement the optional external FET path will average a solution size of less than 100 mm2 (10 mm × 10 mm). These averages will vary with component selection (NFETs, Passives, etc.). Selection of the oval pad TPS65982 footprint or standard TPS65982 footprint will allow for similar results. |
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