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ADF5902 데이터시트(PDF) 12 Page - Analog Devices

부품명 ADF5902
상세설명  24 GHz, ISM Band, Multichannel FMCW Radar Transmitter
PDF  39 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADF5902 데이터시트(HTML) 12 Page - Analog Devices

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ADF5902
Data Sheet
Rev. 0 | Page 12 of 39
PROGRAM MODES
Table 6 and Figure 24 through Figure 42 show how to set up the
program modes in the ADF5902.
Several settings in the ADF5902 are double buffered. These
include the LSB fractional value, R counter value (R divider),
reference doubler, clock divider, RDIV2, and MUXOUT. This
means that two events must occur before the device uses a new
value for any of the double buffered settings. First, the new
value is latched into the device by writing to the appropriate
register. Second, a new write must be performed on Register R5.
For example, updating the fractional value can involve a write to
the 13 LSB bits in Register R6 and the 12 MSB bits in Register R5.
Write to Register R6 first, followed by the write to Register R5.
The frequency change begins after the write to Register R5.
Double buffering ensures that the bits written to in Register R6
do not take effect until after the write to Register R5.
Table 6. C5, C4, C3, C2, and C1 Truth Table
Control Bits
C5 (DB4)
C4 (DB3)
C3 (DB2)
C2 (DB1)
C1 (DB0)
Register
0
0
0
0
0
R0
0
0
0
0
1
R1
0
0
0
1
0
R2
0
0
0
1
1
R3
0
0
1
0
0
R4
0
0
1
0
1
R5
0
0
1
1
0
R6
0
0
1
1
1
R7
0
1
0
0
0
R8
0
1
0
0
1
R9
0
1
0
1
0
R10
0
1
0
1
1
R11
0
1
1
0
0
R12
0
1
1
0
1
R13
0
1
1
1
0
R14
0
1
1
1
1
R15
1
0
0
0
0
R16
1
0
0
0
1
R17



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