전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

AD7940BRJ-R2 데이터시트(PDF) 7 Page - Analog Devices

부품명 AD7940BRJ-R2
상세설명  3mW, 100kSPS, 14-Bit ADC in 6-Lead SOT-23
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD7940BRJ-R2 데이터시트(HTML) 7 Page - Analog Devices

Back Button AD7940BRJ-R2 Datasheet HTML 3Page - Analog Devices AD7940BRJ-R2 Datasheet HTML 4Page - Analog Devices AD7940BRJ-R2 Datasheet HTML 5Page - Analog Devices AD7940BRJ-R2 Datasheet HTML 6Page - Analog Devices AD7940BRJ-R2 Datasheet HTML 7Page - Analog Devices AD7940BRJ-R2 Datasheet HTML 8Page - Analog Devices AD7940BRJ-R2 Datasheet HTML 9Page - Analog Devices AD7940BRJ-R2 Datasheet HTML 10Page - Analog Devices AD7940BRJ-R2 Datasheet HTML 11Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 20 page
background image
AD7940
Rev. 0 | Page 7 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
CS
SDATA
SCLK
6
5
4
VDD 1
GND
2
VIN 3
AD7940
TOP VIEW
(Not to Scale)
SOT-23
Figure 3. SOT-23 Pin Configuration
NC = NO CONNECT
AD7490
MSOP
TOP VIEW
(Not to Scale)
VDD 1
GND
2
GND
3
VIN 4
CS
SDATA
NC
SCLK
8
7
6
5
Figure 4. MSOP Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
SOT-23
Pin No.
MSOP
Mnemonic
Function
1
1
VDD
Power Supply Input. The VDD range for the AD7940 is from 2.5 V to 5.5 V.
2
2, 3
GND
Analog Ground. Ground reference point for all circuitry on the AD7940. All analog input signals should
be referred to this GND voltage.
3
4
VIN
Analog Input. Single-ended analog input channel. The input range is 0 V to VDD.
4
5
SCLK
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from this part. This clock
input is also used as the clock source for the AD7940's conversion process.
5
7
SDATA
Data Out. Logic output. The conversion result from the AD7940 is provided on this output as a serial
data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from the
AD7940 consists of two leading zeros followed by 14 bits of conversion data that are provided MSB
first. This will be followed by four trailing zeroes if CS is held low for a total of 24 SCLK cycles. See the
Serial Interface section.
6
8
CS
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on
the AD7940 and framing the serial data transfer.
N/A
6
NC
No Connect. This pin should be left unconnected.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com