STA450A datasheet(21/66 Pages) STMICROELECTRONICS

21 / 66 page

21/66

STA450A

HOST_ClkStop

Address

: 0x3A

Type

: R

Software Reset

: NA

Hardware Reset

: 0

Description

Clearing the bit 0 the clock to the core is started.

HOST_SOFTVER

Address

: 0x40

Type

: R/W

Software Reset

: NA

Hardware Reset

: NA

Description

The SOFTVER register is the version of the microcode which is running on the device (BCD).

This register is updated just after a soft reset of the device.

HOST_EVENTINTE 0 -1 -2 -3

Address

: 0x44 - 0x41

Type

: R/W

Software Reset

: NA

Hardware Reset

: NA

Description

These registers are associated to error condition inside the STA450A.

The STA450A contains a 32 bits interrupt register associated with 32 bits enable register.

A bit set in this register will enable the generation of an external interrupt on the interrupt line.

The interrupt associated with each bit is given in the register INT description.

HOST_EVENTINT 0 - 1 - 2 - 3

7654

3210

7654

3210

7654

3210

INTE[31:24]

INTE[23:16]

INTE[15:8]

INTE[7:0]

7654

3210

INT[31:24]

INT[23:16]

INT[15:8]

INT[7:0]

STA450A 데이터시트(PDF) 21 Page - STMicroelectronics

STA450A 데이터시트(HTML) 21 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66

데이터시트 다운로드

링크 URL