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74LVC2G66 데이터시트(PDF) 5 Page - Silicon Supplies

부품명 74LVC2G66
상세설명  Low Voltage CMOS Logic
PDF  9 Pages
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제조업체  SS [Silicon Supplies]
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74LVC2G66 데이터시트(HTML) 5 Page - Silicon Supplies

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Low Voltage CMOS Logic – 74LVC2G66
Rev 1.0
29/06/19
AC Electrical Characteristics7
LIMITS
PARAMETER
SYMBOL
VCC
CONDITIONS
25°C
85°C
FULL RANGE
5
UNITS
1.8 ±0.15V
CL = 30pF,
RL = 1kΩ
2
2
2
ns
2.5 ±0.2V
CL = 30pF,
RL = 500Ω
1.2
1.2
1.2
ns
3.3 ±0.3V
CL = 50pF,
RL = 500Ω
0.8
0.8
0.8
ns
Propagation
Delay,
Input A or B
to
Output B or A
8
tPLH / tPHL
(tpd)
5 ±0.5V
CL = 50pF,
RL = 500Ω
0.6
0.6
0.6
ns
7. Not production tested in die form, characterized by chip design and tested in package 8. The propagation delay is the calculated RC time constant
of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
DC Electrical Characteristics Continued (Voltages Referenced to GND)
LIMITS
PARAMETER
SYMBOL
VCC
CONDITIONS
25°C
85°C
FULL RANGE
6
UNITS
Off-State
Switch
Leakage
Current
ISW(OFF)
5.5V
VIN = VCC
VOUT = GND,
VIN = GND
VOUT = VCC,
OE = VIL
±0.1
±0.2
±0.2
µA
On-State
Switch
Leakage
Current
ISW(ON)
5.5V
VIN = VCC
or GND,
OE = VIH,
VOUT = Open
±0.1
±1
±1
µA
Enable Input
Current
IIN
5.5V
OE = VCC
or GND,
±0.1
±1
±1
µA
Supply
Current
ICC
5.5V
VSW = VCC
or GND
1
1
1
µA
Additional
Supply
Current
ΔICC
5.5V
One input at
VCC - 0.6V,
other inputs
GND or VCC
500
500
500
µA
TYPICAL
Enable Input
Capacitance
CIN
5V
3.5
CIO(OFF)
6
Switch
Input/Output
Capacitance
CIO(ON|)
5V
14
pF
1.8V
8
2.5V
9
3.3V
9.5
Power
Dissipation
Capacitance
CPD
5V
f = 10MHz,
TA = 25°C
11
pF



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