LSM6DSOP datasheet(71/107 Pages) STMICROELECTRONICS

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LSM6DSOP

107

9.37

TIMESTAMP0 (40h), TIMESTAMP1 (41h), TIMESTAMP2 (42h),

and TIMESTAMP3 (43h)

Timestamp first data output register (r). The value is expressed as a 32-bit word and the bit

resolution is 25 μs.

Table 105. TIMESTAMP output register description

9.38

LIR_CONFIG (56h)

Activity/inactivity functions, configuration of filtering (r/w).

Table 107. LIR_CONFIG register description

Table 104. TIMESTAMP output registers

D31

D30

D29

D28

D27

D26

D25

D24

D23

D22

D21

D20

D19

D18

D17

D16

D15

D14

D13

D12

D11

D10

D[31:0]

Timestamp output registers: 1LSB = 25 μs

Table 106. LIR_CONFIG register

0(1)

1. This bit must be set to '0' for the correct operation of the device.

INT_CLR

_ON_

READ

SLEEP_

STATUS_

ON_INT

SLOPE_

FDS

0(1)

LIR

INT_CLR_ON_

READ

This bit allows immediately clearing the latched interrupts of an event detection

upon the read of the corresponding status register. It must be set to 1 together

with LIR. Default value: 0

(0: latched interrupt signal cleared at the end of the ODR period;

1: latched interrupt signal immediately cleared)

SLEEP_STATUS

_ON_INT

Activity/inactivity interrupt mode configuration.

If the INT_SLEEP_CHANGE bit is enabled, drives the sleep status or sleep

change on the INT pin. Default value: 0

(0: sleep change notification on INT pin; 1: sleep status reported on INT pin)

SLOPE_FDS

HPF or SLOPE filter selection on wake-up and Activity/Inactivity functions.

Default value: 0

(0: SLOPE filter applied; 1: HPF applied)

LIR

Latched Interrupt. Default value: 0

(0: interrupt request not latched; 1: interrupt request latched)

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