PCF2127TSLASH2Y datasheet(40/100 Pages) PHILIPS

40 / 100 page

PCF2127

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Product data sheet

Rev. 8 — 19 December 2014

40 of 100

NXP Semiconductors

PCF2127

Accurate RTC with integrated quartz crystal for industrial applications

8.10.5 Register Weekday_alarm

8.10.6 Alarm flag

When all enabled comparisons first match, the alarm flag AF (register Control_2) is set.

AF remains set until cleared by command. Once AF has been cleared, it will only be set

again when the time increments to match the alarm condition once more. For clearing the

flags, see Section 8.11.6

Alarm registers which have their alarm enable bit AE_x at logic 1 are ignored.

8.11 Timer functions

The PCF2127 has two different timer functions, a watchdog timer and a countdown timer.

The timers can be selected by using the control bits WD_CD[1:0] in the register

Watchdg_tim_ctl.

• The watchdog timer has four selectable source clocks. It can, for example, be used to

detect a microcontroller with interrupt and reset capability which is out of control (see

Section 8.11.3)

Table 52.

Weekday_alarm - weekday alarm register (address 0Eh) bit allocation

Bit positions labeled as - are not implemented and return 0 when read. Bits labeled as X are undefined at power-on and

unchanged by subsequent resets.

Bit

Symbol

AE_W

WEEKDAY_ALARM (0 to 6)

Reset

value

Table 53.

Weekday_alarm - weekday alarm register (address 0Eh) bit description

Bit positions labeled as - are not implemented and return 0 when read. Bits labeled as X are undefined at power-on and

unchanged by subsequent resets.

Bit

Symbol

Value

Description

AE_W

weekday alarm is enabled

weekday alarm is disabled

6 to 3

unused

2 to 0

WEEKDAY_ALARM

0 to 6

weekday alarm information

Example where only the minute alarm is used and no other interrupts are enabled.

Fig 22. Alarm flag timing diagram

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