M58LT128GST datasheet(26/98 Pages) STMICROELECTRONICS

26 / 98 page

4 Command Interface

M58LT128GST, M58LT128GSB

26/98

If a Program command is issued during a Block Erase Suspend, then the erase cannot be

resumed until the program operation has completed.

See Appendix C, Figure 21: Program Suspend & Resume Flowchart and Pseudo Code, and

Figure 23: Erase Suspend & Resume Flowchart and Pseudo Code, for flowcharts for using the

Program/Erase Resume command.

4.11.1 Protection Register Program

command

The Protection Register Program command is used to program the user One-Time-

Programmable (OTP) segments of the Protection Register and the two Protection Register

Locks.

The device features 16 OTP segments of 128 bits and one OTP segment of 64 bits, as shown

in Figure 4: Protection Register Map. The segments are programmed one Word at a time.

When shipped all bits in the segment are set to ‘1’. The user can only program the bits to ‘0’.

Two Bus Write cycles are required to issue the Protection Register Program command.

The first bus cycle sets up the Protection

The second latches the address and data to be programmed to the Protection Register

and starts the Program/Erase Controller.

Read operations to the bank being programmed output the Status Register content after the

program operation has started.

Attempting to program a previously protected Protection Register will result in a Status Register

error.

The Protection Register Program cannot be suspended. Dual operations between the

Parameter Bank and the Protection Register memory space are not allowed (see Table 15:

Dual Operation Limitations for details).

The two Protection Register Locks are used to protect the OTP segments from further

modification. The protection of the OTP segments is not reversible. Refer to Figure 4:

Protection Register Map, and Table 8: Protection Register Lock Bits, for details on the Lock bits.

See Appendix C, Figure 24: Protection Register Program Flowchart and Pseudo Code, for a

flowchart for using the Protection Register Program command.

4.12

Set Configuration Register command

The Set Configuration Register command is used to write a new value to the Configuration

Two Bus Write cycles are required to issue the Set Configuration Register command.

The first cycle sets up the Set Configuration Register command and the address

corresponding to the Configuration Register content.

The second cycle writes the Configuration Register data and the confirm command.

The Configuration Register data must be written as an address during the bus write cycles, that

is DQ0 = CR0, DQ1 = CR1, …, DQ15 = CR15. Addresses A0-A22 are ignored.

Read operations output the array content after the Set Configuration Register command is

issued.

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