XRT7250 datasheet(200/463 Pages) EXAR

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DS3/E3 FRAMER IC

XRT7250

REV. 1.1.1

181

• Set Bit 3 (Tx FEAC Interrupt Status) within the Tx

DS3 FEAC Configuration & Status Register, as

illustrated below.

The purpose of this interrupt is to alert the Microcon-

troller/Microprocessor that the Transmit FEAC Pro-

cessor has completed its transmission of a given

FEAC message and is now ready to transmit the next

FEAC Message, to the Remote Terminal Equipment.

4.2.6.1.3

The Completion of Transmission of

the LAPD Message Interrupt

If the Transmit Section interrupts have been enabled

at the Block level, then the user can enable or disable

the Completion of Transmission of a LAPD Message

Interrupt by writing the appropriate value into Bit 1

(TxLAPD Interrupt Enable) within the Tx DS3 LAPD

Status & Interrupt Register (Address = 0x34), as illus-

trated below.

Setting this bit-field to “1’ enables the Completion of

Transmission of a LAPD Message Interrupt. Con-

versely, setting this bit-field to “0” disables the Com-

pletion of Transmission of a LAPD Message interrupt.

4.2.6.1.4

Servicing the Completion of Trans-

mission of a LAPD Message Interrupt

As mentioned previously, once the user commands

the LAPD Transmitter to begin its transmission of a

LAPD Message, it will do the following.

1. It will parse through the contents of the Transmit

LAPD Message Buffer (located at address loca-

tions 0x86 through 0xDD) and search for a string

of five (5) consecutive “1’s”. If the LAPD Trans-

mitter finds a string of five consecutive “1’s”

(within the content of the LAPD Message Buffer,

then it will insert a “0” immediately after this

string.

2. It will compute the FCS (Frame Check Sequence)

value and append this value to the back-end of

the user-message.

3. It will read out of the content of the user (zero-

stuffed) message and will encapsulate this data

into a LAPD Message frame.

4. Finally, it will begin transmitting the contents of

this LAPD Message frame via the “DL” bits, within

each outbound DS3 frame.

5. Once the LAPD Transmitter has completed its

transmission of this LAPD Message frame (to the

Remote Terminal Equipment), the XRT7250

Framer IC will generate the Completion of Trans-

mission of a LAPD Message Interrupt to the

Microcontroller/Microprocessor. Once the

XRT7250 Framer IC generates this interrupt, it

will do the following.

• Assert the Interrupt Output pin (INT) by toggling it

"Low".

• Set Bit 0 (TxLAPD Interrupt Status) within the

TxDS3 LAPD Status and Interrupt Register, as

illustrated below.

TRANSMIT DS3 FEAC CONFIGURATION & STATUS REGISTER (ADDRESS = 0X31)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Not Used

Tx FEAC

Interrupt

Enable

TxFEAC

Interrupt

Status

TxFEAC

Enable

TxFEAC

Busy

R/W

RUR

R/W

0011

000

TXDS3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Not Used

TxDL Start

TxDL Busy

TxLAPD

Interrupt

Enable

TxLAPD

Interrupt

Status

R/W

RUR

0000

000

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