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XRT7250 데이터시트(PDF) 202 Page - Exar Corporation

부품명 XRT7250
상세설명  DS3/E3 FRAMER IC
PDF  463 Pages
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제조업체  EXAR [Exar Corporation]
홈페이지  http://www.exar.com
Logo EXAR - Exar Corporation

XRT7250 데이터시트(HTML) 202 Page - Exar Corporation

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DS3/E3 FRAMER IC
XRT7250
REV. 1.1.1
183
1. To receive encoded digital data from the DS3 LIU
IC.
2. To decode this data, convert it into a binary data
stream and to route this data to the Receive DS3
Framer block.
Figure 73 presents a simple illustration of the Receive
DS3 LIU Interface block.
The Receive Section of the XRT7250 will via the Re-
ceive DS3 LIU Interface Block receive timing and data
information from the incoming DS3 data stream. The
DS3 Timing information will be received via the RxLi-
neClk input pin and the DS3 data information will be
received via the RxPOS and RxNEG input pins. The
Receive DS3 LIU Interface block is capable of receiv-
ing DS3 data pulses in unipolar or bipolar format. If
the Receive DS3 framer is operating in the bipolar for-
mat, then it can be configured to decode either AMI or
B3ZS line code data. Each of these input formats
and line codes will be discussed in detail, below.
4.3.1.1
Unipolar Decoding
If the Receive DS3 LIU Interface block is operating in
the Unipolar (single-rail) mode, then it will receive the
Single Rail NRZ DS3 data pulses via the RxPOS in-
put pin. The Receive DS3 LIU Interface block will al-
so receive its timing signal via the RxLineClk signal.
NOTE: The RxLineClk signal will function as the timing
source for the entire Receive Section of the XRT7250.
No data pulses will be applied to the RxNEG input
pin. The Receive DS3 LIU Interface block receives a
logic "1" when a logic "1" level signal is present at the
RxPOS pin, during the sampling edge of the RxLi-
neClk signal. Likewise, a logic "0" is received when a
logic "0" level signal is applied to the RxPOS pin.
Figure 74 presents an illustration of the behavior of
the RxPOS, RxNEG and RxLineClk input pins when
the Receive DS3 LIU Interface block is operating in
the Unipolar mode.
FIGURE 73. A SIMPLE ILLUSTRATION OF THE RECEIVE DS3 LIU INTERFACE BLOCK
RxPOS
RxNEG
RxLineClk
To Receive DS3
Framer Block
Receive DS3
LIU Interface
Block



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