ADC3541 datasheet(24/68 Pages) TI1

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7.3.3 Voltage Reference

The ADC354x provides three different options for supplying the voltage reference to the ADC. An external 1.6 V

reference can be directly connected to the VREF input; a voltage 1.2 V reference can be connected to the

REFBUF input using the internal gain buffer or the internal 1.2 V reference can be enabled to generate a 1.6V

reference voltage. For best performance, the reference noise should be filtered by connecting a 10 uF ceramic

bypass capacitor to the VREF pin. The internal reference circuitry of the ADC354x is shown in Figure 7-13.

Note

The voltage reference mode can be selected using SPI register writes or by using the REFBUF pin

(default) as a control pin (Section 7.5.1). If the REFBUF pin is not used for configuration, the REFBUF

pin should be connected to AVDD (even though the REFBUF pin has a weak internal pullup to AVDD)

and the voltage reference option has to be selected using the SPI interface.

AINP

AINM

VREF

(1.6V)

REFBUF

(1.2V)

REFGND

VREF1.2

VCM

0.95V

x1.33

Figure 7-13. Different voltage reference options for ADC354x

7.3.3.1 Internal voltage reference

The 1.6 V reference for the ADC can be generated internal using the on-chip 1.2V reference along with the

internal gain buffer. A 10 uF ceramic bypass capacitor (CVREF) should be connected between the VREF and

REFGND pins as close to the pins as possible.

AINP

AINM

VREF

(1.6V)

REFBUF

(1.2V)

REFGND

VREF1.2

VCM

0.95V

X1.33

CVREF

Figure 7-14. Internal reference

ADC3541

SBAS840 – JULY 2020

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