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KMA310 데이터시트(PDF) 35 Page - NXP Semiconductors |
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KMA310 데이터시트(HTML) 35 Page - NXP Semiconductors |
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35 / 71 page ![]() NXP Semiconductors KMA310 Programmable angle sensor IC KMA310 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved. Product data sheet Rev. 3 — 27 February 2019 35 / 71 Table 45. Digital interface Characteristics are valid for the operating conditions, as specified in Section 12. Symbol Parameter Conditions Min Typ Max Unit VIH HIGH-level input voltage 80 %VDD - - V VIL LOW-level input voltage - - 20 %VDD V VOH HIGH-level output voltage IO = 2 mA 80 %VDD - - V VOL LOW-level output voltage IO = 2 mA - - 20 %VDD V Iod overdrive current absolute value for overdriving the output buffer - - 20 mA tstart start time LOW level before rising edge [1] 5 - - µs tstop stop time HIGH level before falling edge 5 - - µs Tbit bit period the load capacitance limits the minimum period 10 - 100 µs ΔTbit bit period deviation deviation between received clock and sent clock 0.8Tbit 1Tbit 1.2Tbit µs tw0 pulse width 0 0.175Tbit 0.25Tbit 0.375Tbit µs tw1 pulse width 1 0.625Tbit 0.75Tbit 0.825Tbit µs tto time-out time communication reset guaranteed after maximum tto 250 - - µs ttko(slv) slave takeover time duration of LOW level for slave takeover 1 - 5 µs ttko(mas) master takeover time duration of LOW level for master takeover 0Tbit - 0.5Tbit µs tprog programming time for a single memory address 20 - - ms [1] In SENT mode, the OUT/DATA pin must be kept HIGH for at least tto before sending the initial command sequence to enter the command mode. Table 46. Internal capacitances Characteristics are valid for the operating conditions, as specified in Section 12. Symbol Parameter Conditions Min Typ Max Unit Cblock blocking capacitance [1][2] 100 200 300 nF CL load capacitance [1] 1.1 2.2 3.3 nF [1] Measured at 1 MHz. [2] Total capacitance between VDD and GND. |
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