VSC7440 datasheet(70/444 Pages) MICROSEMI

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Functional Descriptions

VMDS-10492 VSC7440 Datasheet Revision 4.2

The assembler is responsible for detecting PAUSE frames and forwarding the PAUSE value to the

disassembler. Because PAUSE frames belong to the MAC control sublayer, they should in general be

filtered and not forwarded to a higher layer; that is, forwarded on the cell bus so they reach the analyzer.

The filtering is done by abort marking the frame.

The PAUSE frame and other MAC control frames can be forwarded to the analyzer. For PAUSE frame

forwarding, ASM::PAUSE_CFG.ABORT_PAUSE_ENA must be set to 0. For other MAC control frame

forwarding, ASM::PAUSE_CFG.ABORT_CTRL_ENA must be set to 0.

When PAUSE frames are received, the DMAC address is checked. The DMAC address must be either

the 48-bit multicast address 01-80-C2-00-00-01 as mentioned by IEEE802.3 Annex 31B.1 or the MAC

address of the port, which is configured in ASM::MAC_ADDR_HIGH_CFG.MAC_ADDR_HIGH and

ASM::MAC_ADDR_LOW_CFG.MAC_ADDR_LOW.

Note: The values configured in ASM::MAC_ADDR_HIGH_CFG.MAC_ADDR_HIGH and

ASM::MAC_ADDR_LOW_CFG.MAC_ADDR_LOW must match the value configured in

DSM::MAC_ADDR_BASE_HIGH_CFG.MAC_ADDR_HIGH and

DSM::MAC_ADDR_BASE_LOW_CFG.MAC_ADDR_LOW.

The number of received PAUSE frames is tracked as part of the port statistics. For more information, see

Setting Up Assembler Port Statistics, page 53.

3.11.4

Setting Up PFC

The PFC module of the assembler identifies PFC PAUSE frames by checking if the DMAC matches the

reserved multicast address 01-80-c2-00-00-01, the Type/Length field matches a MAC control frame

(0x8808), and the opcode is indicating a PFC frame (0x0101). Upon receiving a PFC PAUSE frame, the

assembler extracts and stores the timer information for all enabled priorities in the assembler PFC

timers. The PFC module generates a stop signal towards the queue system based on the current timer

values.

Detection of PFC frames is enabled by setting ASM::PFC_CFG.RX_PFC_ENA to 1 for the respective

(port,priority). When enabling PFC the current link speed for the port must be configured in

ASM::PFC_CFG.FC_LINK_SPEED for timing information to be evaluated correctly. The PFC

configuration registers are shown in the following table.

3.11.5

Setting Up Assembler Port Statistics

The assembler collects port statistics for all DEV1Gs and DEV2G5s. Statistics are also collected from the

disassembler and the assembler. Port statistics for DEV10Gs are not collected in the assembler and

must be looked up in each DEV10G separately.

The following table lists the port statistics configuration register in the assembler.

Port statistics inside the ASM are stored in RAMs. Before they can be used, they must be initialized to 0

by setting ASM::STAT_CFG.STAT_CNT_CLR_SHOT to 1.

Table 34 •

PFC Configuration Register Overview

Target::Register.Field

Description

Replication

ASM::PFC_CFG.RX_PFC_ENA

Enable PFC per priority

Per port

ASM::PFC_CFG.FC_LINK_SPEED

Configure the link speed

Per port

Table 35 •

Port Statistics Configuration Register Overview

Target::Register.Field

Description

Replication

ASM::STAT_CFG.STAT_CNT_CLR_SHOT

Statistics counter initialization.

ASM::PORT_CFG.CSC_STAT_DIS

Disables collection of statistics in the

ASM.

Per port

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