ARA-R404M-00B datasheet(18/43 Pages) U-BLOX

18 / 43 page

SARA-R4 series - Data sheet

UBX-16024152 - R18

Pin definition

Page 18 of 43

Name

Power

domain

I/O

Description

Remarks

SCL

DDC

I2C bus clock line

Fixed open drain.

Internal 2.2 k pull-up resistor to V_INT.

Not supported by “00” and “01” product versions

See section 4.2.13 for detailed electrical specs.

USB_D-

USB

I/O

USB Data Line D-

90  nominal differential impedance.

Pull-up, pull-down and series resistors, as required by the

USB 2.0 specifications [11], are part of the USB pin driver

and shall not be provided externally.

See section 4.2.11 for detailed electrical specs.

Provide test point for diagnostic purposes.

USB_D+

USB

I/O

USB Data Line D+

90  nominal differential impedance.

Pull-up, pull-down and series resistors, as required by

USB 2.0 specifications [11], are part of the USB pin driver

and shall not be provided externally.

See section 4.2.11 for detailed electrical specs.

Provide test point for diagnostic purposes.

GND

N/A

Ground

All the GND pins must be connected to ground

RSVD

N/A

RESERVED pin

Leave unconnected.

GND

N/A

Ground

All the GND pins must be connected to ground

RSVD

N/A

RESERVED pin

This pin can be connected to GND.

I2S_WA /

SPI_MOSI

GDI

O /

I2S word alignment /

SPI Master Output Slave

Input

I2S word alignment, alternatively configurable as

SPI Master Output Slave Input

Not supported by “00”, “01”, “x2”, “x3” product versions

See section 4.2.12 for detailed electrical specs.

I2S_TXD /

SPI_CS

GDI

O /

I2S transmit data /

SPI Chip Select

I2S transmit data out, alternatively configurable as

SPI Chip Select

Not supported by “00”, “01”, “x2”, “x3” product versions

See section 4.2.12 for detailed electrical specs.

I2S_CLK /

SPI_CLK

GDI

O /

I2S clock /

SPI clock

I2S clock, alternatively configurable as

SPI clock

Not supported by “00”, “01”, “x2”, “x3” product versions

See section 4.2.12 for detailed electrical specs.

I2S_RXD /

SPI_MISO

GDI

I /

I2S receive data /

SPI Master Input Slave

Output

I2S receive data input, alternatively configurable as

SPI Master Input Slave Output

Not supported by “00”, “01”, “x2”, “x3” product versions

See section 4.2.12 for detailed electrical specs.

SIM_CLK

SIM

SIM clock

See section 4.2.10 for detailed electrical specs.

SIM_IO

SIM

I/O

SIM data

Internal 4.7 k pull-up resistor to VSIM.

See section 4.2.10 for detailed electrical specs.

SIM_RST

SIM

SIM reset

See section 4.2.10 for detailed electrical specs.

VSIM

SIM supply output

VSIM = 1.80 V typical or 2.95 V typical generated by the

module according to the external SIM card type.

See section 4.2.3 for detailed electrical specs.

GPIO5

GDI

SIM detection

SIM card presence detection input, alternatively

configurable as GPIO (see section 2.7).

See section 4.2.12 for detailed electrical specs.

GND

N/A

Ground

All the GND pins must be connected to ground

SDIO_D2

GDI

I/O

SDIO serial data [2]

Not supported by “00”, “01”, “x2”, “x3” product versions

See section 4.2.12 for detailed electrical specs.

SDIO_CLK

GDI

SDIO serial clock

Not supported by “00”, “01”, “x2”, “x3” product versions

See section 4.2.12 for detailed electrical specs.

SDIO_CMD

GDI

I/O

SDIO command

Not supported by “00”, “01”, “x2”, “x3” product versions

See section 4.2.12 for detailed electrical specs.

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