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T1024RDB 데이터시트(PDF) 19 Page - Freescale Semiconductor, Inc |
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T1024RDB 데이터시트(HTML) 19 Page - Freescale Semiconductor, Inc |
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19 / 49 page ![]() RGMII MDIO/MDC RGMII EMI1 (MAC4) T1024 RGMII EMI1 (MAC3) RTL8211E_VB RTL8211E_VB Transformer RGMII MDIO/MDC RJ-45 Port RJ-45 Port Transformer Figure 2-8. EC1/EC2 interface connectivity 2.9 Ethernet Management Interface (EMI) The T1024 processor has two Ethernet Management Interfaces (EMI), EMI1 and EMI2. EMI2 is only used with 10G Base-T PHY and 2.5G SGMII PHY, which uses 1.2 V pull- up. EMI1 is used with RGMII PHYs. There are two working modes in the T1024RDB- PC. The following tables represents the configurations for 10GBase-T and 2.5G SGMII working modes: Working mode Image in Flash SW3 [1:8] On = 0 SerDes Protocal ETH0 ETH1 ETH2 ETH3 PCIe Slot 10GBase-T Bank 0 (Default) 00100001 0x95 1G/100M 1G/100M 10G/ 2.5G/1G Disable Enable 2.5G SGMII Bank4 01101001 0x135 1G/100M Disable Disable 2.5G Disable Working mode SerDes Protocal Lane A Lane B Lane C Lane D EC1 EC2 10GBase-T 0x95 XFI (MAC1) PEXc PEXb PEXa MAC4 MAC3 2.5G SGMII 0x135 Aurora SGMII (MAC3) PEXb PEXa MAC4 N/A The below figure shows the EMI hardware block diagram. Chapter 2 Architecture QorIQ T1024 Reference Design Board User Guide, Rev. 0, 04/2015 Freescale Semiconductor, Inc. 19 |
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